Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

A compensation injection method for effectively reducing LDNMOS cut-off current and avoiding dual peak feature and its application

A technology of cut-off current and characteristics, applied in the manufacturing of circuits, electrical components, semiconductor/solid-state devices, etc., can solve the problems affecting the low leakage performance of the device and the high power consumption of the device

Inactive Publication Date: 2008-01-16
SEMICON MFG INT (SHANGHAI) CORP
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0007] However, the problems of cut-off current and bimodal characteristics of LDNMOS transistors produced by the current process directly affect the low leakage performance of the device and cause excessive power consumption of the device.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • A compensation injection method for effectively reducing LDNMOS cut-off current and avoiding dual peak feature and its application
  • A compensation injection method for effectively reducing LDNMOS cut-off current and avoiding dual peak feature and its application
  • A compensation injection method for effectively reducing LDNMOS cut-off current and avoiding dual peak feature and its application

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0023] In the existing manufacturing flow of LDNMOS with channel length = 3.5um and channel width = 20um 40V, a photolithography is added after the existing triple gate (Triple Gate) process.

[0024] Specific areas are patterned on the mask used in this additional lithography.

[0025] Referring to Fig. 4, L1 in the figure is 0.2um, and L is 0.5um. W1=W2=0.5um.

[0026] After exposure and baking, B ion implantation is performed.

[0027] B ion implantation, using 20kev-50kev, B doping concentration using 10 12 -10 13 / cm 2 .

[0028] After the ion implantation, the photoresist is removed, and the subsequent LDNMOS production process is performed, and these subsequent processes are the same as the prior art.

[0029] The LDNMOS transistor produced after using the embodiment is detected, and its Id-Vg characteristic curve is shown in Figure 6. When Vg=0V, Id is about 1.00E-13A / um; and in the existing transistor Id-Vg curve , the Id value when Vg=0V is about 1.00E-11A / um....

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a compensation injection method able to effectively lower LDNMOS cut-off current and avoid double-hump characteristic. Besides ordinary photosensitive and ion injection techniques, the invention uses the photosensitive technique to generate a given area, which spans over the boundary of LDNMOS grid and shallow groove separation. The invention carries out iron injection contrary to the electric property of groove in the area, thus lowering the cut-off current and avoiding double-hump characteristic of LDNMOS appliances.

Description

technical field [0001] The present invention relates to the manufacturing process of integrated circuits (Integrated Circuit, IC), in particular to the manufacturing process of LDNMOS (Laterally Diffused N-type Metal Oxide Semiconductor Transistor). Background technique [0002] LDNMOS (Laterally Diffused N type Metal Oxide semiconductor, laterally diffused N type metal oxide semiconductor transistor) plays an important role in the design and manufacture of integrated circuits. For example, HV LDNMOS (High voltage Laterally Diffused N type MetalOxide semiconductor, high voltage laterally diffused N type metal oxide semiconductor transistor) is widely used in the drive of TFT-LCD (Thin Film Transistor-liquid crystal Display, thin film transistor liquid crystal display) in the chip. At present, the manufacture of HV LDMOS devices has been integrated in the standard 0.18um logic process. Although its integration and performance have been improved, it still has problems in term...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L21/336H01L21/266
Inventor 梅奎崔崟郭兵金起凖程超
Owner SEMICON MFG INT (SHANGHAI) CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com