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I2C slave/master interface enhancement using state machines

A state machine, state technology, applied in the direction of instruments, electrical digital data processing, etc., can solve the problem of unable to start data transmission and so on

Inactive Publication Date: 2008-06-25
NXP BV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

For example, output devices such as display screens are typically not capable of initiating data transfers, and thus will be configured only as devices

Method used

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  • I2C slave/master interface enhancement using state machines
  • I2C slave/master interface enhancement using state machines
  • I2C slave/master interface enhancement using state machines

Examples

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Embodiment Construction

[0017] While various modifications and alternatives can be made to the present invention, specific examples are shown in the drawings and described in detail below. It is to be understood, however, that the particular embodiments described are not to be considered as limitations of the invention. On the contrary, the intention is to cover all modifications, equivalents and alternatives falling within the scope of the invention as defined in the claims.

[0018] The present invention is generally applicable to a method and apparatus for enhancing a slave / master interface on an I2C bus using a state machine. The present invention has been found to be particularly advantageous for Inter-Integrated Circuit (I2C) serial data communication buses, but also for other buses and communication protocols, such as the System Management Bus (SMBus) architecture and / or protocols or other serial data communication systems. For purposes of illustration, and not limitation, the invention will ...

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PUM

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Abstract

Consistent with one example embodiment, communications systems, using a serial data transfer bus having a serial data line and a clock line used to implement a communications protocol, incorporate enhanced slave / master interfacing on an I2C bus using state machines. The communications system includes a first and second state-machine responsive to the rising edge of the clock signal, and a third state-machine, distinctly operational from the first and second state-machine, responsive to the falling edge of the clock signal. One of the first state-machine and the second state-machine conform to write states of the communications protocol, and the other of the first state-machine and the second state-machine conform to read states of the communications protocol.

Description

technical field [0001] The present invention relates generally to communication apparatus and methods, and more particularly, to methods and apparatus for enhancing a slave / master interface on an I2C bus using a state machine. Background technique [0002] The Inter-Integrated Circuit (I2C) bus, developed by Philips, allows integrated circuits to communicate directly with each other via a simple bidirectional two-wire bus (plus power and ground). Devices are connected to each of two lines on this bus, one line is the serial data line (SDA) for data communication, and the other line is the serial line for control and synchronization of data communication between the devices. Clock line (SCL). Each device is connected in parallel to another device, and each bus line (SDA and SCL) acts as a wired-AND of all the lines on that bus. The output of each device is configured as an open-collector / open-drain device, and one or more pull-up resistors maintain a 'soft' high logic on th...

Claims

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Application Information

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IPC IPC(8): G06F13/38G06F13/42
CPCG06F13/4291G06F13/385
Inventor 阿姆里塔·德什潘德
Owner NXP BV
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