Polysilicon concatenating diode

Abstract

The invention discloses a multi-crystal silicon cascade diode which includes a P substrate. N traps are equipped at two ends of the P substrate, two deep N traps which bottom are connected into a whole are arranged in each N trap, a P trap are equipped between the two deep N traps, N+ diffusion active regions are respectively arranged on each deep N trap, a P+ diffusion active region and a N+ diffusion active region are arranged on the P trap, all of the diffusion active regions are insulated by a shallow groove insulated layer, a plurality of P+ intrinsic multi-crystal silicon and a plurality of N+ intrinsic multi-crystal silicon which have same quantity with the P+ intrinsic multi-crystal silicon are equipped on the shallow groove insulated layer between the two N traps, the P+ intrinsic multi-crystal silicon and the N+ intrinsic multi-crystal silicon are distributed at an interval and connected by a intrinsic multi-crystal silicon. In the multi-crystal silicon cascade diode, the P+ diffusion active regions on each of the P traps and the N+ diffusion active regions between the two deep N traps are connected which are equivalent to that a emitter electrode and a base electrode in a parasitical triode of the cascade diode are connected, thereby inhibiting darlington effect.

Description

technical field [0001] The invention belongs to the technical field of integrated circuits, in particular to a polysilicon cascaded diode. Background technique [0002] Electrostatic discharge (ESD, Electron Static Discharge) is an instantaneous process in which a large amount of static charge is poured into the integrated circuit from the outside to the inside when the pins of an integrated circuit are floating, and the whole process takes about 100ns. When the electrostatic discharge of the integrated circuit will generate hundreds or even thousands of volts of high voltage, the gate oxide layer of the input stage in the integrated circuit will be broken down. With the advancement of integrated circuit technology, the feature size of MOS transistors is getting smaller and smaller, and the thickness of the gate oxide layer is getting thinner. In this trend, high-performance ESD protection devices are used to discharge electrostatic charges to protect the gate. The extreme ...

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Problems solved by technology

[0006] The P+ diffused active area closest to the edge of the cascaded diode is connected to the electrical anode (Anode), and the N+ diffused active area closest to the edge is connected to the electrical cathode (Cathode), but the DC leakage of the cascaded diode is large, which limits Its scope of application

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