High voltage N type SOI MOS transistor

Abstract

A metal oxide semiconductor (MOS) of an N-shaped silicon-on-insulator (SOI) in high voltage comprises a semiconductor substrate. An insulating buried oxide, an N-shaped doped semiconductor area and a P well region are arranged on the semiconductor substrate, and a field oxide, a metal layer, a gate oxide, a polysilicon gate and an oxide layer are arranged on the surface of the MOS. The MOS is characterized in that a blocking oxide is arranged on a buried oxide and positioned below the gate oxide, a channel region is formed between the blocking oxide and the gate oxide, a P-shaped inversion layer is arranged in the N-shaped doped semiconductor area and positioned on the lower surface of the field oxide between an N-shaped drain region and an N-shaped source region. Thanks to such a structure, cavities sensed from an interface on which the N-shaped doped semiconductor area and the buried oxide are connected gather on the bottom of the N-shaped doped semiconductor area, thus greatly increasing the charge density on the interface, therefore, the thinner buried oxide can bear higher vertical breakdown voltage.

Description

Technical field: [0001] The present invention relates to the field of power semiconductor devices, and more specifically, relates to a structure of a silicon-on-insulator metal oxide semiconductor (SOI LDMOS) suitable for high-voltage applications. Background technique: [0002] Since the device made of silicon-on-insulator material can realize full dielectric isolation, its parasitic capacitance and leakage current are small, and the driving current is large, so it is very suitable for manufacturing power integrated circuits and devices. In order to make silicon-on-insulator devices work better, it is an important research topic to improve the breakdown voltage of silicon-on-insulator devices. As we all know, the withstand voltage of a silicon-on-insulator power device depends on the minimum of its lateral withstand voltage and vertical withstand voltage. The lateral withstand voltage of the device can be achieved by using bulk silicon junction termination technologies such...

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Problems solved by technology

However, it makes most of the buried oxide layer have a large thickness, which is not conducive to the heat dissipation of the device, and also reduces the bonding strength. In addition, the etching of a large number of grooves also brings the complexity of the entire manufacturing process.

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