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Multi- chip semiconductor device possessing leads and its manufacture method

A semiconductor and multi-chip technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems such as poor reliability of packages and manufacturing difficulties

Inactive Publication Date: 2008-11-26
SILICONWARE PRECISION IND CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] However, in the above-mentioned semiconductor package, since the lead frame is integrated into the substrate, in addition to manufacturing difficulties, and because the metal material guide pins are arranged in the resin material substrate, this will be caused by the stress problems of various interfaces. The package still has the problem of poor reliability

Method used

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  • Multi- chip semiconductor device possessing leads and its manufacture method
  • Multi- chip semiconductor device possessing leads and its manufacture method
  • Multi- chip semiconductor device possessing leads and its manufacture method

Examples

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no. 1 example

[0046] see Figure 3A to Figure 3E , is a schematic diagram of the manufacturing method of the multi-chip semiconductor device with leads of the present invention, and the following will be described in a batch production method, and of course, it can also be carried out in a single process method.

[0047] Such as Figure 3A As shown, a substrate module sheet 310 having a plurality of substrates 31 is provided, and a plurality of connection pads 311 are provided on the surface of each substrate 31 for mounting a plurality of semiconductor chips 32 on the surface of each substrate 31 . The semiconductor chips 32 can be electrically connected to the substrate 31 through bonding wires 33 as shown in the figure, or can be electrically connected to the substrate 31 in a flip-chip manner; the connection pads 311 are disposed on the edge of the substrate 31 .

[0048] Such as Figure 3B and Figure 3C As shown, the encapsulant 34 covering the semiconductor chip 32 and the bonding w...

no. 2 example

[0055] see Figure 4A and Figure 4B , is a schematic diagram of a second embodiment of the multi-chip semiconductor device with leads and its manufacturing method of the present invention, wherein for the convenience of description and understanding, the same or similar elements corresponding to the previous ones are represented by the same numbers.

[0056] The multi-chip semiconductor device with leads and its manufacturing method in this embodiment are roughly the same as those in the previous embodiments, the main difference is that after the package unit of the chip package is completed and the connection pads exposing the encapsulant are electrically connected to the leads , can also provide a ring reinforcement 41 (such as Figure 4A shown), so that the reinforcing member 41 is connected to the lead 351 through a non-conductive adhesive 42, and the encapsulant 34 of the packaging unit is accommodated in the annular opening 410 of the reinforcing member 41, thereby Th...

no. 3 example

[0058] see Figure 5 , is a schematic diagram of a third embodiment of a multi-chip semiconductor device with leads and a manufacturing method thereof according to the present invention, wherein for the convenience of description and understanding, the same or similar elements corresponding to the previous ones are denoted by the same numbers.

[0059] The multi-chip semiconductor device with leads of this embodiment and its manufacturing method are roughly the same as those of the foregoing embodiments, the main difference being that the packaging unit that completes the chip package and the connection pads that expose the packaging compound and the lead wires of the lead frame are electrically connected. After the permanent connection, a heat sink 51 with a cavity 510 can also be provided, so that the heat sink 51 can be connected to the guide pin 351 through a non-conductive glue 52, and the top surface of the cavity 510 can be separated by a gap. The thermally conductive a...

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PUM

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Abstract

The invention discloses a multi-chip semiconductor device with leads and a preparation method thereof, which provides a substrate with a plurality of connection pads on the surface and a lead frame with a plurality of leads, wherein a plurality of semiconductor chips are electrically connected to the substrate surface by the connection pads arranged on the substrate, package colloid which are coated on the semiconductors and expose from the connection pads are arranged on the substrate to form packaging units, the exposed connection pads of the packaging units are electrically connected with the leads of the lead frame, thereby forming the multi-chip semiconductor device with leads. The multi-chip semiconductor device with leads can avoid the problems of poor reliability caused by integrating a substrate or leads in a package or package damage caused by moisture absorption of a substrate in the prior art.

Description

technical field [0001] The invention relates to a semiconductor device, in particular to a multi-chip semiconductor device with guide pins and its manufacturing method. Background technique [0002] The traditional lead frame type semiconductor package, such as the quad flat package (Quad Flat Package, QFP), is manufactured by sticking on a lead frame with a die pad and a plurality of leads. Place a chip, and then electrically connect the pads on the upper surface of the chip with the corresponding multiple leads through a plurality of wires (Wire), and wrap the chip and wires with an encapsulant to form a wire rack type semiconductor package. Related technologies can be found in US Patent Nos. 5,874,773, 6,696,750, 6,902,102, and 7,057,293. [0003] In addition, due to the miniaturization of electronic products and the increase in the demand for high operating speed, in order to improve the performance and capacity of a single semiconductor package to meet the needs of mi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/50H01L21/60H01L21/56H01L25/00H01L25/065H01L23/488H01L23/31
CPCH01L24/97H01L2924/15311H01L2224/48091H01L2224/97H01L2224/73265H01L2224/48247H01L2224/48227H01L2224/32225H01L24/73H01L2924/00012H01L2224/85H01L2924/00014H01L2924/00
Inventor 刘正仁张锦煌黄建屏詹长岳黄致明
Owner SILICONWARE PRECISION IND CO LTD
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