Multi-processor environment assembly line processing method and equipment

A processing method and multi-processor technology, applied in the pipeline field, can solve the problems of poor adaptability, performance mismatch, high resource utilization, etc., and achieve the effect of dynamic balance, avoidance of overhead, and optimal gain.

Inactive Publication Date: 2009-01-07
IBM CN
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, traditional pipeline programming suffers from very poor adaptability, tasks can only be pre-divided and statically assigned to specific processors
Note that the execution code path (code path) of each data packet is often different from each other, that is to say, for the same DPI application, for different data packets, the subroutines it participates in and the computing resource requirements of each subroutine may be different , so it is difficult to expect high resource utilization through static methods
This is a critical issue for DPI applications as even a one percent loss in performance gain can result in a mismatch with the desired performance
[0006] Similarly, for many applications other than DPI applications, there is also the problem of balancing subtasks across multiple processors, regardless of what the task is or what data it processes

Method used

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  • Multi-processor environment assembly line processing method and equipment
  • Multi-processor environment assembly line processing method and equipment
  • Multi-processor environment assembly line processing method and equipment

Examples

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Embodiment Construction

[0028] As an example, an application program has 11 functions or routines main(), F1() to F10(), and their calling relationship is shown in FIG. 1 . According to the traditional pipeline processing technology, each function is statically divided. For example, F1() is executed by processor #1, further function calls from F2() to F6() and F5() are executed by processor #2, and F7() and subsequent function calls are executed by processor #3. As mentioned in the background technology section, the adaptability of this static partition is poor. During the actual execution of the application program, depending on the data to be processed, the tasks of each processor may not be balanced. For example, when F4() does not call F7(), processor #3 is idle for the application at this time, and processor #2 needs to handle more tasks than when F4() calls F7(), That is to multi-process F5 (), F6 () and so on.

[0029] Therefore, aiming at this problem, the present invention proposes a new p...

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Abstract

The present invention relates to a method and an equipment for processing pipeline in a multiprocessor environment. The method comprises the steps of dividing a task into overlapping subtasks and distributing the subtasks to a plurality of processors, the overlapping part of each subtask is shared by the processor which disposes the corresponding subtask, determining the state of each processor during the process of implementing the subtask by each processor, and dynamically determining the overlapping part of each subtask to be implemented by the processor which disposes the corresponding subtask according to the state of the processor. According to the present invention, the dynamic balance of the subtask between multiple processors is implemented beautifully, so as to make the most of the calculation resource to implement optimum gain of a multicore processor.

Description

technical field [0001] The invention relates to pipeline technology, in particular to a pipeline processing method and equipment in a multiprocessor environment. Background technique [0002] As a new network application that has just emerged and gradually received widespread attention, DPI (DeepPacket Inspection, deep packet inspection) is sensitive to performance. Its processing performance requirements are proportional to the interface wire-speed because DPI processes not only packet headers (packet headers), but also packet payloads. [0003] Multi-processor (multi-core or multi-chip, such as SMP (Symmetric Multi-Processor)) is a promising approach to solve the performance problem of DPI because of its powerful processing / computing power. However, in some cases, DPI makes it difficult to adopt the traditional parallel programming model for data load balancing. The reason is that network communication is usually based on flow / session (the so-called "flow" refers to the ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/50
Inventor 郑凯冯博绍凌
Owner IBM CN
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