Method for implementing assist nuclear task dynamic PRI scheduling with hardware assistant

A dynamic priority, hardware-assisted technology, applied in the direction of resource allocation, multi-programming devices, etc., can solve problems such as the performance bottleneck of the scheduler system, and achieve the effect of eliminating performance bottlenecks, reducing burden, and avoiding starvation.

Inactive Publication Date: 2009-04-22
ZHEJIANG UNIV
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Problems solved by technology

Moreover, as the number and types of auxiliary cores increase, if the scheduler running on the main core is still used to schedule many types of auxiliary cores and auxiliary core tasks, the scheduler may become the bottleneck of system performance.

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  • Method for implementing assist nuclear task dynamic PRI scheduling with hardware assistant

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Embodiment Construction

[0027] In the present invention, the execution of the auxiliary core task is divided into the above three stages. In each stage of the task, the hardware scheduler assists the operating system scheduler running on the main core to manage and schedule the auxiliary core task correspondingly. The implementation of the present invention will be described in detail below.

[0028] 1. An implementation method of hardware-assisted auxiliary core task dynamic priority scheduling, characterized in that:

[0029] 1) Three phases of the auxiliary nuclear mission:

[0030] ① Auxiliary core task preprocessing stage

[0031] The main core is responsible for the preprocessing stage of the auxiliary core task. The process running on the main core that needs to be accelerated by the auxiliary core will create an auxiliary core task running on the auxiliary core to accelerate the application program. The main creation is the auxiliary core The context of the task includes the instruction seq...

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Abstract

The invention discloses an implementation method for hardware-assisted dynamic priority scheduling of slave core tasks. The method comprises the following steps: architectural support is provided for scheduling by an operating system based on a main core plus slave core system so as to assist the operating system scheduler to schedule the slave core tasks, a hardware scheduler maintains hardware queues of three ready tasks, arrived tasks are inserted into the corresponding ready task queues according to a task priority, and the circumstance that the slave core task is starved is avoided by periodic priority promotion. The method effectively reduces the difficult in supporting an embedded heterogeneous multi-core system by a software system through the architectural support, lightens the burden of the main core scheduling and the slave core tasks management, and obviously increases the throughput of the slave core tasks. The method has more obvious effects under the conditions of numerous types and a great number of slave cores and complex scheduling algorithms.

Description

technical field [0001] The invention relates to the field of computer architecture design and the field of operating system design, in particular to a method for realizing hardware-assisted dynamic priority scheduling of auxiliary core tasks. Background technique [0002] With the rapid development of semiconductors and corresponding integrated circuit manufacturing processes, the density of transistors integrated on a chip is constantly increasing, so that more and more components can be integrated into a single chip. Integrating various functional modules for different purposes on a single chip can not only increase the communication speed between modules and improve system performance, but also reduce the area of ​​the chip, thereby reducing the energy consumption of the chip. [0003] In order to meet various application requirements, various heterogeneous multi-core systems designed for specific applications are becoming more and more popular. In this system, in additi...

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Application Information

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IPC IPC(8): G06F9/50
Inventor 陈天洲严力科冯德贵王罡陈度
Owner ZHEJIANG UNIV
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