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A method for realizing nor FLASH bad block management and its control circuit

A technology for controlling circuits and bad blocks, applied in the field of FLASH flash memory, can solve the problems of taking up system execution time, cumbersome management and update backup, etc., and achieve the effect of high erasing and writing endurance

Active Publication Date: 2012-02-15
BEIJING TONGFANG MICROELECTRONICS
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

But in many applications, there are often some data that need to be updated and maintained frequently, and this part of the data needs to be erased frequently. It requires a higher endurance than 100,000 times of erasing and writing, and software is used to manage and update bad data blocks. Backups can be cumbersome and take up a lot of system execution time

Method used

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  • A method for realizing nor FLASH bad block management and its control circuit
  • A method for realizing nor FLASH bad block management and its control circuit
  • A method for realizing nor FLASH bad block management and its control circuit

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Embodiment Construction

[0026] see figure 1 , the present invention includes FLASH divided into common area, frequently used area and replacement area. The common area and frequently used area are accessible areas of the system bus, and the common area cannot be replaced. The common area can replace the logical address of the bad block through the replacement area, and the replacement area is the replacement backup area of ​​the common area. The invention also includes an erasing and replacing control unit for controlling FLASH erasing and replacing, a power-on error correction unit for checking and verifying write errors when the system is powered on, an index storage unit, and a FLASH interface unit for controlling FLASH erasing and writing timing. The erase replacement control unit and the power-on error correction unit are connected to each other and respectively to the FLASH interface unit, and the FLASH interface unit is connected to the index storage unit and the FLASH. The erasing and repla...

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Abstract

A method for realizing NOR FLASH bad block management and a control circuit thereof relate to the technical field of FLASH flash memory. The control circuit of the present invention includes a FLASH which is divided into a common area, a frequently used area and a replacement area. The common area and frequently used area are accessible areas of the system bus, and the common area cannot be replaced. The common area can replace the logical address of the bad block through the replacement area. The replacement area is a replacement backup area for the common area. The control circuit of the present invention also includes an erase and replace control unit for controlling FLASH erase and replace, a power-on error correction unit for checking and verifying write errors when the system is powered on, an index storage unit, and a FLASH interface unit for controlling FLASH erase and write timing. Compared with the prior art, the present invention physically configures and partitions the FLASH, records, erases and replaces bad blocks, and corrects errors when powered on, so that when the system logical address accesses the NOR FLASH, it has different endurance for erasing and writing.

Description

technical field [0001] The invention relates to the technical field of FLASH flash memory, in particular to a method for managing embedded systems or FLASH bad blocks and a control circuit thereof. Background technique [0002] FLASH, also known as flash memory, is a non-volatile memory that erases, writes and reprograms memory cells in units of pages (SECTOR) or blocks (BLOCK). The write operation of any FLASH device can only be performed in empty or erased cells. In most cases, erasure must be performed before the write operation. [0003] NOR and NAND are the two main non-volatile flash memory technologies on the market today. Intel first developed NOR FLASH technology in 1988, which completely changed the situation where EPROM and EEPROM dominated the world. Then, in 1989, Toshiba released the NAND FLASH structure, emphasizing the reduction of cost per bit, higher performance, and it can be easily upgraded through the interface like a disk. In most cases, flash memory...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C16/00G11C29/00
Inventor 黄钧李刚陈震徐磊陈冈宗萍乔瑛殷越刘亮
Owner BEIJING TONGFANG MICROELECTRONICS
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