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Imager with recessed color filter array and method of forming the same

A color filter and dielectric layer technology, applied in the field of semiconductor devices, can solve problems such as transistor annealing

Inactive Publication Date: 2009-10-07
APTINA IMAGING CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In addition to the extra processing step, conventional nitride etch stops have several other disadvantages, for example, preventing effective alloying, which can lead to annealing of defective transistors

Method used

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  • Imager with recessed color filter array and method of forming the same
  • Imager with recessed color filter array and method of forming the same
  • Imager with recessed color filter array and method of forming the same

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Embodiment Construction

[0034] In the following detailed description, reference is made to various specific embodiments in which the invention can be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice them, and it is to be understood that other embodiments may be utilized and structural and electrical changes may be made.

[0035] The term "substrate" as used in the description below may include any semiconductor-based structure having a semiconductor surface. The term should be understood to include silicon, silicon-on-insulator (SOI), silicon-on-sapphire (SOS), doped and undoped semiconductors, silicon epitaxial layers supported by a base semiconductor foundation, and other semiconductor structures. The semiconductor need not be silicon-based. The semiconductor may be silicon-germanium, germanium or gallium arsenide or other semiconductor materials. Furthermore, when reference is made to a "substrate" in the following description, previo...

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Abstract

A recessed color filter array using patterned metal as an etch stop and a method of forming the same. In one embodiment, at least one metal etch stop is formed in a semiconductor dielectric layer at the same time as the formation of one or more layers of metal interconnect elements, thereby reducing the number of necessary process steps and reducing costs. The etch stop may be formed at any layer where other metal elements are present.

Description

technical field [0001] Several embodiments of an embodiment of the invention relate to semiconductor devices and methods of fabricating such devices. Background technique [0002] As imaging arrays are used in smaller and smaller applications, there is a need to reduce the stack height of the imaging arrays, necessitating the use of recessed arrays, i.e., the pixel array is recessed in the substrate to prevent the color filters and lens elements from Some cases extend beyond the desired upper limit of the stack. Forming a recessed array typically requires the use of etch stops to accurately form the array. [0003] Figure 1A and 1B A simplified partial cross-sectional view of a prior art imager 100 is shown with a conventional etch stop 105 formed therein. The imager 100 includes a substrate 101 supporting an array of pixels 102 and a dielectric layer 103 (e.g., an oxide) including a plurality of individual dielectric layers that support connections to associated circuit...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/146
CPCH01L27/14621H01L27/14636H01L27/14627H01L27/14685H01L27/14632H01L27/14687H01L27/146
Inventor 萨曼·阿克拉姆
Owner APTINA IMAGING CORP