Image sensing synchronized method and circuit thereof

Abstract

The invention relates to an image sensing synchronized method and a circuit thereof; wherein the synchronized method comprises: calculating frequency division value according to ADC output data bit length and CPU camera interface DMA bit length in advance; providing a system clock for the CPU and dividing frequency according to the requirement of the frequency division value or directly providing the system clock for an image sensor and the ADC; a synchronized circuit comprises the system clock, a frequency divider and a PWM signal generation unit. The image sensing synchronized method and the circuit thereof ensure transmission of image sensing data in DMA way, and compared with the existing concurrent bus way, loss of pixel data does not occur.

Description

technical field [0001] The invention relates to a digital synchronization circuit, in particular to an image sensing synchronization method and a circuit thereof. Background technique [0002] In image processing, the first step is image sensing, which can be a contact image sensor (CIS sensor); the second step is analog / digital (AD) conversion; the third step is from analog / digital converter (ADC) Obtain data in, the 4th step, process by microprocessor (CPU). At present, since the ADC is a parallel bus, the conventional connection method is to connect the ADC to the data bus of the CPU, and allocate an address space for the ADC chip selection, and the CPU can access the ADC by accessing this space. However, since the signal scanned and output by the image sensor is continuous, the AD conversion of the signal is also continuous. When the sampling rate is relatively high, the data rate continuously output by the ADC is also relatively high. It is very easy to lose pixels by ...

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Problems solved by technology

However, since the signal scanned and output by the image sensor is continuous, the AD conversion of the signal is also continuous. When the sampling rate is relatively high, the data rate continuously output by the ADC is also relatively high. It is very easy to lose pixels by repeatedly operating the bus to read with software. Data, resulting in the incomplete image data collected and the loss of part of the image content, resulting in errors in subsequent image processing and text recognition (OCR)

The Chinese utility model patent "a connection circuit" previously applied by the applicant of the present invention uses the camera interface (CIM) of the CPU to read a large amount of data from the ADC, so that the CIM passively receives the data transmitted from the ADC through DMA, There is no loss of pixel data, but this circuit also needs to be strictly synchronized so that there will be no signal or data error or loss

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