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Metal lug surface planarization method

A metal bump and flat surface technology, applied in the field of semiconductor structures, can solve the problems of difficulty in controlling the concentration of the current density plating solution, difficulty in controlling the uniformity of the bump height and unevenness in the flattening of metal bumps, etc.

Inactive Publication Date: 2010-01-06
CHIPMOS TECH INC
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] With today's bumping technology, it is always difficult to control the planarization and bump height uniformity of a whole wafer or all metal bumps on a chip
The main reason is that it is difficult to control the current density and the concentration of the electroplating solution during electroplating.
Also because of this, no matter in a single wafer or between two wafers or the height of metal bumps between chips can not be effectively controlled all the time
Due to the unevenness of the process when making metal bumps, the heights of multiple metal bumps on the wafer are inconsistent, and the difference in height will lead to a decrease in yield

Method used

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Embodiment Construction

[0016] The direction of the present invention discussed here is a method for flattening the surface of a metal bump, which is a method for flattening a metal bump with a rough surface by using a flattening device. In order to provide a thorough understanding of the present invention, detailed steps and components thereof will be set forth in the following description. Here, the well-known method of forming the metal bumps on the chip and the detailed steps of the back-end process such as chip thinning are not described in detail to avoid unnecessary limitation of the present invention. However, for the preferred embodiments of the present invention, it will be described in detail as follows, but in addition to these detailed descriptions, the present invention can also be widely implemented in other embodiments, and the scope of the present invention is not limited. Subsequent patent scope shall prevail.

[0017] Figure 1A to Figure 1D is a schematic flow chart showing the s...

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Abstract

The invention relates to a metal lug surface smoothening method, including that: a wafer which is provided with a plurality of metal lugs on an active surface is provided, wherein every surface of metal lugs is rough; a planarization device which is provided with an upper pressure plate is provided; the wafer is conveyed and placed on the planarization device, so that a plurality of metal lugs of the active surface of the wafer face to the lower surface of the upper pressure plate; a pressure is applied to a plurality of metal lugs on the active surface of the wafer, namely the lower surface of the upper pressure plate is pressed down and is contacted with the rough surface of a plurality of metal lugs on the active surface of the wafer, so as to planarize the rough surface of a plurality of metal lugs on the active surface of the wafer; and the upper pressure plate is removed, namely the upper pressure plate is separated from a plurality of metal lugs on the active surface of the wafer. Thus, the surface of a plurality of metal lugs on the active surface of the wafer is planarized.

Description

technical field [0001] The present invention relates to a semiconductor structure, and more particularly to a method of eliminating surface roughness of a plurality of metal bumps on a wafer. Background technique [0002] In order to provide the flatness that the semiconductor needs to achieve after entering the sub-half micron (sub-half micron) through the process, IBM Corporation of the United States has successfully developed a method called chemical mechanical polishing (Chemical mechanical polishing, CMP) process. CMP is currently the only method known to provide comprehensive planarization of VLSI or ULSI processes. If the control parameters of the process are selected at the optimum value, CMP can provide the flatness of the grinding surface as high as 94%. [0003] With current bumping technology, it is always difficult to control the planarization and bump height uniformity of all metal bumps on a whole wafer or chip. The main reason is that it is difficult to co...

Claims

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Application Information

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IPC IPC(8): H01L21/60H01L23/485
Inventor 傅文勇
Owner CHIPMOS TECH INC