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Method for reducing defects in memory cell capacitor

A technology of capacitor structure and recessed area, which is applied in the direction of capacitors, electric solid devices, circuits, etc., can solve the problems of complex manufacturing process and structure, difficult to manufacture, etc., and achieve the effect of increasing output

Active Publication Date: 2010-01-06
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Additionally, these traditional cell regions are often difficult to fabricate and often require complex fabrication processes and structures

Method used

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  • Method for reducing defects in memory cell capacitor
  • Method for reducing defects in memory cell capacitor
  • Method for reducing defects in memory cell capacitor

Examples

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Embodiment Construction

[0017] According to the present invention, an integrated circuit and its processing technology for semiconductor device manufacture are provided. By way of example, the present invention provides a method of fabricating a capacitor for a dynamic random access memory device commonly referred to as a DRAM. It should be recognized, however, that the scope of the invention is much broader. For example, the invention is applicable to microprocessor devices, memory devices, application specific integrated circuit devices, and others.

[0018] A method of fabricating an integrated circuit device can be summarized as follows:

[0019] 1. Provide semiconductor substrates, such as silicon wafers, with a size of 300 mm or more;

[0020] 2. providing a surface region on said semiconductor substrate;

[0021] 3. forming a dielectric layer overlying said surface region;

[0022] 4. planarizing the dielectric layer;

[0023] 5. defining a capacitor region and a peripheral region having ...

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Abstract

The invention provides a method for forming a cylindrical stack-based capacitor structure. The method comprises the following steps of: providing a semiconductor substrate; forming an age node structure in a memory cell area; forming a dielectric layer covering the age node structure; using the patterning and the first etching processes to expose the age node; forming a polysilicon layer and a rough surface polysilicon layer, which cover the exposed age node; masking the memory cell area and exposing a peripheral area; using the chemical dry method etching process to remove the rough surface polysilicon layer and the polysilicon layer in the peripheral area; and fattening the rough surface polysilicon layer and the polysilicon layer, and forming the dielectric depression. The cylindrical stack-based capacitor structure formed by the method is basically free from the defects caused by the residual rough surface polysilicon in the peripheral area, so that the output of the device is increased, and the technological range is widened.

Description

technical field [0001] The present invention relates to integrated circuits and their processing for use in the manufacture of semiconductor devices. In particular, the present invention provides a method and structure for fabricating capacitor structures for dynamic random access memory, commonly referred to as DRAM. It should be recognized, however, that the scope of the invention is much broader. Background technique [0002] Integrated circuits have grown from a few to millions of interconnected devices fabricated on a single silicon chip. Traditional integrated circuits have provided performance and complexity far beyond what was originally imagined. In order to increase complexity and circuit density (i.e., the number of devices that can be packed on a given chip area), the minimum device feature size, known as device "geometry," has changed with each generation of integrated circuits. smaller. [0003] Increasing circuit density not only increases the complexity a...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/822H01L21/8242H10B12/00
CPCH01L27/10852H01L27/10894H01L28/91H10B12/09H10B12/033
Inventor 金玲林大成游智星程蒙召傅焕松
Owner SEMICON MFG INT (SHANGHAI) CORP
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