Integrated circuit testing and sorting method and device thereof

Abstract

The invention provides a novel integrated circuit testing and sorting method and a device thereof. The method comprises the steps of: locating an integrated circuit (IC), clamping a left side IC pin, testing by using a testing machine, loosening the IC and releasing the IC; the structure comprises a test-bit track component, a cylinder clamping component, a left side clip arm component, a right clip arm component, a pressing test cylinder component, a golden finger mounting bracket component and the like, wherein the test-bit track component comprises a test-bit upper guide track and a test-bit lower guide track; the left side clip arm component and the right clip arm component are installed on the cylinder clamping component; and a pressing test head component comprises an adjustable pressing test head mounting base plate and a pressing test head which is provided with an elastic contact spring piece. After the IC is accurately located and fastened, the method simultaneously leads the IC pins to be clamped so as to lead the distance between the IC pins to be reduced or inconsistent, thus leading encapsulation IC automatic test with the IC pins not in the same plane to be possible, improving the reliability of clamp and accuracy of test, and reducing the phenomenon of flexural deformation of the pins.

Description

technical field [0001] The invention relates to a testing and sorting machine for integrated circuit series products, in particular to a method and device for testing and sorting SSDIP / SDIP packaged integrated circuits, which are suitable for power semiconductor devices using special / shrinkable dual in-line packaging (Special shape dual in-line package / Shrink dual in-1ine package) IC test sorting. The invention belongs to the technical field of semiconductor integrated circuit testing and sorting equipment manufacturing. Background technique [0002] With the rapid development of composite fully-controlled voltage-driven power semiconductor devices, it has been widely used in high-voltage inverter systems with DC voltages above 600V, such as AC motors, frequency converters, switching power supplies, lighting circuits, traction drives and other fields. For this type of power semiconductor device in the new SSDIP / SDIP package, the pin center distance is less than 2.54mm and t...

AI Technical Summary

Problems solved by technology

Existing plug-in test methods are limited to manual use and cannot meet production needs

And the test clamping method of the commonly used integrated circuit test sorter can not meet its insulation test and function test requirements

Moreover, in the past, the test clamping mechanism of the sorting machine used gold fingers to touch the IC pins through unilateral drive, which was easy to bend the pins, especially the SSDIP package pins are not on the same plane, and the clamping force is different, which will make it easier to bend the tube foot

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