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BM3D assembly device designed on basis of ASIC

An integrated, 3D technology, applied in the direction of computing, color TV parts, TV system parts, etc., can solve the problem that the software cannot perform BM3D real-time processing, and achieve the effect of eliminating external memory access and eliminating repeated access

Active Publication Date: 2012-07-04
SHANGHAI FULLHAN MICROELECTRONICS
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  • Summary
  • Abstract
  • Description
  • Claims
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AI Technical Summary

Problems solved by technology

[0006] The technical problem to be solved by the present invention is to provide a BM3D assembly device based on ASIC design. This technical solution solves the situation that the software cannot perform real-time processing of BM3D under the current technical conditions. This technology uses the design method of ASIC to make BM3D Aggregated devices are capable of real-time operation

Method used

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  • BM3D assembly device designed on basis of ASIC
  • BM3D assembly device designed on basis of ASIC
  • BM3D assembly device designed on basis of ASIC

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Embodiment Construction

[0015] In order to make the purpose, technical solution and advantages of the present invention clearer, the device structure and application flow of the present invention implemented on the BM3D real-time processing ASIC are analyzed below in conjunction with the drawings and specific embodiments.

[0016] In this embodiment, the BM3D parameters to be processed are selected as follows: block size B is 8, block step size is 6, each group is 8 blocks, single-channel PAL format D1 video, and number of reference frames is 9. Each linked list node stores 15 image blocks, indexed by row, and the image accumulation buffer row D is 4. Take the first-pass set processing analysis of brightness data as an example. It should be noted that the selection of block size, block step size, group, video system, and the image block stored by the linked list node does not affect the beneficial effect of the present invention, as long as the selected above-mentioned parameters are based on The tec...

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Abstract

The invention provides a BM3D assembly device designed on the basis of ASIC, which is coupled to a 3D noise reduction module and an external storage unit. The assembly device comprises a writing-out unit, a read unit, a reconstitution unit and an address management unit, wherein the writing-out unit is used for receiving image processing information output by the 3D noise reduction module and stores the image processing information into the external storage unit; the read unit is used for reading the image processing information from the external storage unit; the reconstitution unit is used for receiving the image processing information from the read unit and reconstructing images according to the image processing information; the address management unit manages the address of the external storage unit and provides address information to the writing-out unit and the read unit; and the image process information comprises an image block, a block coordinate, a block weight and group information. The technical scheme solves the problem that software can not carry out BM3D real-time processing in the prior art; the technology of the invention utilizes an ASIC design mode to ensure that the BM3D assembly device can carry out real-time operation.

Description

technical field [0001] The invention relates to a video noise reduction algorithm, in particular to an ASIC-based BM3D assembly device. Background technique [0002] BM3D (Block-Matching and 3D Filtering, Block Matching and 3D Noise Reduction) algorithm is currently known as the general image / video noise reduction algorithm with the highest noise reduction performance. This algorithm uses the autocorrelation of images and the time correlation of videos to perform Effective noise reduction. . The BM3D algorithm can perform multiple iterations, and the standard BM3D algorithm is two iterations. The steps of the BM3D algorithm include block matching, 3D noise reduction, and aggregation. In the block matching step, BM3D searches for blocks similar to the current block in the current frame and the reference frame, and collects them into groups; in the 3D denoising step, it transforms the groups generated during the matching process and converts them in the transform domain Af...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F17/50H04N5/21
Inventor 诸悦董鹏宇
Owner SHANGHAI FULLHAN MICROELECTRONICS
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