Parity check code decoder and receiving system

A technology of receiving system and decoder, applied in the field of low-density parity check code decoder and receiving system, can solve the problems of inaccurate probability of equal nodes, complicated calculation process, poor reliability, etc.

Active Publication Date: 2010-08-18
REALTEK SEMICON CORP
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  • Abstract
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Problems solved by technology

However, the offset does not change with the channel quality, resulting in the probability of the same node obtained by iteration is still not accurate enough, and the reliability of the decoded output is not good.
[0005] In the paper (LDPC Decoding Algorithm with Estimation of Noise Variance) proposed by Changzheng Ma and Boon Poh Ng in 2006, although it is also recommended to use the updated channel quality for the next iterative calculation, the calculation process is quite complicated, so will cause a burden on the hardware

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  • Parity check code decoder and receiving system
  • Parity check code decoder and receiving system
  • Parity check code decoder and receiving system

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Embodiment Construction

[0032] The aforementioned and other technical content, features and effects of the present invention will be clearly presented in the following detailed description of a preferred embodiment with reference to the drawings.

[0033] refer to figure 1 , the preferred embodiment of the receiving system 100 of the present invention is suitable for receiving an LDPC-coded carrier signal through channel 7, and the carrier signal has multiple modulation data. This preferred embodiment includes an LDPC decoder 1 , a de-mapper 2 (de-mapper), a re-mapper 3 (re-mapper) and a channel estimator 5 . In this embodiment, the carrier signal adopts a binary phase shift keying (Binary Phase Shift Keying, BPSK) modulation method, but it can also be a two-dimensional phase shift keying (Quadrature Phase Shift Keying, QPSK), orthogonal frequency division multiplexing (Orthogonal Frequency Division Multiplex, OFDM) or others.

[0034] The channel estimator 5 calculates the initial channel variatio...

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Abstract

The invention relates to a parity check code decoder, which is suitable for receiving a channel quality ratio and at least N bits to be decoded. The parity check code decoder comprises a verification device, a reliability generating device, a bit exchanging device, an exchange checking device and a reliability updating device, wherein the verification device takes each bit to be decoded as a one-bit node and makes one matrix multiply an N-bit node to obtain an (N-K) checking node; the reliability generating device generates a reliable pointer, which is used as an abnormal check index transmitted to the checking node by the bit node, for each bit node; the bit exchanging device generates an abnormal bit pointer for each checking node so as to transmit to the bit node; the exchange checkingdevice updates a plurality of abnormal check pointers, which are used to be transmitted to the checking nodes by the bit nodes, based on the abnormal bit pointers; and the reliability updating deviceupdates the reliable pointer of each bit node according to the abnormal check pointer so as to determine an updating value of each bit node.

Description

technical field [0001] The present invention relates to a decoding technology, in particular to a low-density parity-check code (low-density parity-check code, LDPC) decoder and a receiving system. Background technique [0002] Low Density Parity Check Code (LDPC) is a type of error correction code. Since the coding gain is close to the Shannon limit, it has been gradually adopted in some communication standards recently, such as: the second generation of satellite digital video broadcasting (Digital Video Broadcast-Satellite version 2, DVB-S2), digital TV terrestrial multimedia broadcasting (Digital Terrestrial Multimedia Broadcasting, DTMB) or IEEE 802.11. At the receiving end, the LDPC decoder regards each bit to be decoded from the channel as a bit node, and the N bit nodes must satisfy (N-K) conditions to obtain correct decoding. These conditions are called check nodes. [0003] In order to reduce channel interference, the LDPC decoder uses the check nodes to check w...

Claims

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Application Information

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IPC IPC(8): H04L1/00H04L25/02H03M13/11
Inventor 王承康林后唯洪佳君
Owner REALTEK SEMICON CORP
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