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Clock signal holding method and device

A clock signal and signal technology, applied in the field of clock signal maintenance methods and devices, can solve the problems of short maintenance time and high clock cost, and achieve the effect of prolonging the maintenance time

Active Publication Date: 2010-09-29
北京万海云科技有限公司
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  • Summary
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  • Description
  • Claims
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AI Technical Summary

Problems solved by technology

The cost of a clock with such precision (that is, crystal oscillator) is very high, and if a clock with high precision is used, the time it can maintain is relatively short

Method used

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  • Clock signal holding method and device
  • Clock signal holding method and device

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Embodiment Construction

[0034] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0035] figure 2 It is a structural diagram of a clock signal maintaining device according to an embodiment of the present invention. Such as figure 2 As shown, the device includes: a GPS receiving unit 201 , a frequency counting unit 202 , a phase detecting unit 203 , a crystal oscillator 204 , a clock phase-locked loop 205 , a core processing unit 206 and a digital-to-analog converter 207 . in:

[0036] The GPS receiving unit 201 is configured to receive a pulse per second (1PPS) signal generated by GPS, and send the pulse per second signal of GPS to the frequency counting unit 202 and the phase detection unit 203 .

[0037] The crystal oscillator 204 is used to output the clock signal; here the crystal oscillator is the abbreviation of the ...

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PUM

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Abstract

The invention discloses a clock signal holding method and a clock signal holding device. The method comprises the following steps of: by taking a pulse-per-second signal of a global positioning system (GPS) as reference, adjusting a crystal oscillator according to a formula of DAC=DAC'+k1*delta freq until the clock frequency of the crystal oscillator reaches a nominal value; then adjusting the crystal oscillator according to a formula of DAC=DAC'+k2*delta phase; recording n groups of data on time point t, temperature T and adjustment value DAC of the crystal oscillator; and adjusting the crystal oscillator according to a formula of DAC=aT+bt+DAC HV so as to hold the clock frequency when the pulse-per-second signal of the GPS fails. The technical scheme of the invention can greatly prolongthe holding time of the clock under the same conditions.

Description

technical field [0001] The invention relates to the technical field of communication, and in particular relates to a method and device for maintaining a clock signal. Background technique [0002] In Time Division Synchronous Code Division Multiple Access (TD-SCDMA, Time Division Synchronous CDMA) system, the 5ms uplink and downlink switch control signals of different base stations require strict synchronization, and the clock sources of different base stations need to be very strict in the same frequency and phase characteristics, so it is necessary The clock algorithm guarantees the locking of frequency and phase to achieve ideal tracking and locking characteristics. [0003] When bad weather occurs or the reference signal of the upper-level Global Positioning System (GPS, Global Position System) is lost, the base station needs a clock algorithm to maintain the system clock frequency and phase stability within a certain period of time, and can continue to provide services ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04L7/033
Inventor 葛芷斌鲁雪峰
Owner 北京万海云科技有限公司
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