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Double-CPU redundancy control system based on analysis redundancy mechanism

A technology of redundant control and CPU module, applied in the field of dual-CPU redundant control system, can solve the problems of low CPU utilization, poor generality, etc., to ensure real-time performance, shorten system downtime, and improve system reliability. Effect

Active Publication Date: 2010-12-15
XIDIAN UNIV
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AI Technical Summary

Problems solved by technology

Compared with the "cold backup" strategy, the "hot backup" strategy saves the system downtime, and can run without interruption when the system fails, with high reliability. For any output function, the CPU utilization rate is low; and at the beginning of the system operation, it must be specified that one CPU module is the main one and one CPU module is the backup, so the versatility is not good

Method used

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  • Double-CPU redundancy control system based on analysis redundancy mechanism
  • Double-CPU redundancy control system based on analysis redundancy mechanism
  • Double-CPU redundancy control system based on analysis redundancy mechanism

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Embodiment Construction

[0019] refer to figure 1 , the present invention is mainly composed of the first CPU module A, the second CPU module B, the first load 1 and the second load 2, the first CPU module A controls the first load 1, and the second CPU module B controls the second load 2. Each CPU module includes a data acquisition sub-module, an eCAN bus communication sub-module, an analysis redundancy mechanism sub-module, a redundancy switching sub-module and a redundancy control sub-module. The data acquisition sub-module is bidirectionally connected to the eCAN bus communication sub-module, the eCAN bus communication sub-module is unidirectionally connected to the analysis redundancy mechanism sub-module, the analysis redundancy mechanism sub-module is unidirectionally connected to the redundancy switching sub-module, and the redundancy switching sub-module One-way connection with redundant control submodules. The data acquisition sub-module collects system input signals, and sends the collect...

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Abstract

The invention discloses a double-CPU redundancy control system based on analysis redundancy mechanism, mainly solving the problems that the existing double-CPU redundancy control system has long downtime, low CPU use ration and low reliability. The control system is composed of two CPU modules, wherein each CPU module also comprises a data acquisition submodule, an eCAN bus communication submodule, an analysis redundancy mechanism submodule, a redundancy switching submodule and a redundancy control submodule; the two CPU modules adopt the redundancy strategy of 'mutual backup' and realize double CPU synchronization and data exchange by eCAN bus communication; the analysis redundancy mechanism judges the CPU module fault; if the two CPU modules both have no faults, the first CPU module A controls the first load 1, and the second CPU module B controls the second load 2; and if the first CPU module A fails, the second CPU module B takes over the first load 1, vice versa. The system shortens downtime, improves CPU use ration and system reliability, and is suitable for industrial real-time monitoring and the like.

Description

technical field [0001] The invention belongs to the field of electronic circuits, and relates to a dual-CPU redundant control system, which is used in the field of industrial real-time monitoring. Background technique [0002] The redundant control system is to add spare key equipment. Once the working system fails, the control system will start the spare equipment at the fastest speed, so as to maintain the normal operation of the system. In the field of industrial control, the CPU module is the core of the control system. In order to improve the reliability of the system, a dual-CPU redundant control system is often used. [0003] The current dual-CPU redundant control system mostly adopts "cold backup" or "hot backup" redundancy strategy. The so-called "cold backup" redundancy strategy is to configure an additional set of CPU modules as a backup during system design. Once the running CPU module fails, it can be replaced in time. The backup CPU module in this redundancy s...

Claims

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Application Information

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IPC IPC(8): G06F11/16
Inventor 相征徐连军单晓明李亚鹏
Owner XIDIAN UNIV
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