Digital television PSI/SI information distributing system and method
A digital TV and data packet technology, applied in the components of TV system, pulse modulation TV signal transmission, TV and other directions, can solve the problem of heavy CPU load and affect processing of other tasks, and achieve the effect of reducing load
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[0028] see figure 2 The write buffer control module is composed of two sets of registers, the packet attribute register and the write buffer register, and the address mapping table module. The CPU writes the packet to be sent into the write buffer register, and at the same time writes the packet attribute into the packet attribute register. After the preparation is completed, The CPU will write the control position, the main control module responds to the write request, controls the memory control module, transfers the data packet to SDRAM, calculates the SDRAM address according to the packet attribute, and writes it into the address mapping table.
[0029] The write buffer register is implemented by dpram with a data bit width of 32 bits and an address bit width of 6 bits. Only one packet of 188 byte length or 204 byte length is allowed to be saved at a time, and unused addresses are reserved for registers to save CPU address bit width resources.
[0030] see image 3 The i...
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