Electrostatic discharge safeguard structure in integrated circuit
An electrostatic discharge protection and integrated circuit technology, applied in the direction of circuits, electrical components, and electric solid devices, can solve the problems of high trigger voltage, difficulty in design and realization, and large chip area of thyristor devices, so as to reduce the trigger point voltage, The effect of improving uniform conduction and improving the ability to withstand electrostatic discharge current
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[0037] The present invention will be described in detail below in conjunction with specific embodiments.
[0038] Such as figure 1 As shown, the input buffer is composed of PMOS transistor 105 and NMOS transistor 106 . The source of the PMOS transistor 105 is connected to the power rail 101 , and the source of the NMOS transistor 106 is connected to the ground rail 102 . The drains of the PMOS transistor 105 and the NMOS transistor 106 are connected to transmit signals into the chip. The gates of the PMOS transistor 105 and the NMOS transistor 106 are connected, and are connected to the input pad 103 through a resistor 114 . The output buffer is composed of a PMOS transistor 107 and an NMOS transistor 108 . The source of the PMOS transistor 107 is connected to the power rail 101 , and the source of the NMOS transistor 108 is connected to the ground rail 102 . The gates of the PMOS transistor 107 and the NMOS transistor 108 are connected to receive signals output from inter...
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