Device with multiple I2C buses, processor, system main board and industrial controlled computer

Abstract

The invention relates to a device with multiple I2C (Inter-Integrated Circuit) buses, a processor, a system main board and an industrial controlled computer. The device with multiple I2C buses comprises a programmable logic device. The programmable logic device comprises a plurality of I2C bus controllers and a processor interface module, wherein each I2C bus controller has a master work module and a slave work mode, and each I2C bus controller is matched with a register set. The I2C buses of the processor are expanded by the programmable logic device, so that the processor can have a plurality of I2C bus channels. Multiple different units can be hung on each I2C bus, and the units can be master units as well as slave units to meet the requirements of certain specific application occasions, particularly monitoring systems. In the programmable logic device, each I2C bus controller only uses four registers, and therefore, the control complexity is largely reduced, the system can run stably runs and achieve high execution efficiency.

Description

technical field [0001] The invention relates to a processor, more specifically, to a device with multiple I2C buses, a processor, a system main board and an industrial control computer. Background technique [0002] The I2C bus is a two-wire bus developed by Philips for the connection between IC devices. It is a bidirectional, two-wire, serial, and multi-master interface standard. It has a bus arbitration mechanism and is very suitable for close proximity between devices. distance, infrequent data communication. It transmits data between devices connected to the bus through SDA (serial data line) and SCL (serial clock line), and identifies each device according to the address. Each device connected to the bus can pass Unique address and always present simple master-slave relationship Software set address Master can act as master transmitter or master receiver. It is a true multi-master bus that prevents data corruption through collision detection and arbitration if two or ...

AI Technical Summary

Problems solved by technology

[0005] The technical problem to be solved in the present invention is, can not realize multi-channel I2C bus for the processing of prior art; After realizing with pure software I2C interface, it will occupy more CPU resource, inefficiency; Or realize multiple I2C slaves with IC chip When the device is read and written, the design cost of the single board is high, and a device with a multi-channel I2C bus, a processor, a system motherboard and an industrial computer are provided.

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