Method for testing wafer

Abstract

The invention discloses a method for testing a wafer. The method comprises the following steps of: providing the wafer, wherein the wafer is provided with a plurality of chips which are divided into a plurality of types; providing a plurality of testing programs which are in one-to-one correspondence with the chip types respectively; testing the plurality of the chips one by one by using the plurality of the testing programs according to a position order; in the testing process, if a certain chip passes through the test of a certain testing program, classifying the chip as a chip type corresponding to the testing program, and testing the chip of the next position; and if a certain chip cannot pass through the test of all the testing programs, determining that the chip is disabled, and testing the chip of the next position until all the chips on the wafer are tested. The method reduces the testing time, improves the testing efficiency of the wafer, and saves the testing cost.

Description

technical field [0001] The invention relates to the field of semiconductor testing, in particular to a wafer testing method. Background technique [0002] The manufacturing process of semiconductor components can be roughly divided into wafer manufacturing, wafer testing, packaging and final testing. Wafer manufacturing is the process of making electronic circuit components on a silicon wafer. After the fabrication is completed, chips (die) arranged in an array are formed on the wafer, and then the wafer testing step is performed to perform an electrical test on the chip, and the unqualified The chip is eliminated, and the wafer is cut into several chips; finally, the packaging is to package and wire the qualified chips to form the packaged chip, and finally, electrical testing is required to ensure the quality of the integrated circuit. [0003] Regarding wafer testing technology, according to different stages of wafer manufacturing, it is divided into two types: chip test...

AI Technical Summary

Problems solved by technology

[0006] In the existing wafer test method, since the chips of the same type of project are tested together, the wafer moves in a large step during the test process, such as figure 1 The route for testing and moving the first type of project chip 1 shown in , causing the problem of untestable or damaged wafers

In addition, one test program is used for chips of the same type of project, and there are multiple types of project chips on the wafer, so different versions of the program are required to correspond to it. There are many program versions and the efficiency is low; After returning the film and calibrating the probe, re-testing other types of project chips, the test efficiency is low

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