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Methods for manufacturing bit line and nonvolatile memory

A manufacturing method and bit line technology, which is applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve the problems of affecting yield rate, difficult reliability testing, and high resistance of non-volatile memory bit lines affecting reliability, etc. , to achieve the effect of improving product yield, reducing bit line resistance, and improving bit line disturbance

Inactive Publication Date: 2013-10-09
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The invention solves the problem that the bit line resistance of the non-volatile memory in the prior art greatly affects its reliability, and the problem that it is difficult to pass the reliability test and affect the yield

Method used

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  • Methods for manufacturing bit line and nonvolatile memory
  • Methods for manufacturing bit line and nonvolatile memory
  • Methods for manufacturing bit line and nonvolatile memory

Examples

Experimental program
Comparison scheme
Effect test

Embodiment approach

[0020] refer to image 3 As shown, an embodiment of the manufacturing method of the bit line of the present invention includes:

[0021] Step s1, forming a first conductive layer on the substrate on which the ONO stack structure has been formed;

[0022] Step s2, forming a first shielding layer on the first conductive layer;

[0023] Step s3, etching the first shielding layer and the first conductive layer to expose the area where the bit line is to be formed;

[0024] Step s4, performing a first ion implantation to form a lightly doped bit line;

[0025] Step s5, continuing to form a second shielding layer on the substrate;

[0026] Step s6, etching the second shielding layer to expose lightly doped bit lines;

[0027] Step s7, performing second ion implantation to form heavily doped bit lines.

[0028] In an embodiment of the manufacturing method of the bit line described above, the bit line having low resistance is formed by two-step ion implantation. Between the two ...

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Abstract

The invention discloses methods for manufacturing a bit line and a nonvolatile memory. The method for manufacturing the bit line comprises: forming a first conducting layer on a substrate with an oxide-nitride-oxide (ONO) laminating structure; forming a first shielding layer on the first conducting layer; etching the first shielding layer and the first conducting layer to expose an area on which the bit line is to be formed; injecting first ions to form a lightly doped bit line; continuously forming a second shielding layer on the substrate; etching the second shielding layer to expose the lightly doped bit line; and injecting the second ions to form a heavily doped bit line. The method for manufacturing line can manufacture a low-resistance bit line, so bit line disturbance is reduced, programming / erasing speed is improved, and the qualification rate of reliability detection is also improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a manufacturing method of a bit line and a nonvolatile memory. Background technique [0002] Non-volatile memory can still maintain on-chip information after the power supply is turned off; it is electrically erasable and reprogrammable in the system, and does not require special high voltage; non-volatile memory has the characteristics of low cost and high density. Its unique performance makes it widely used in various fields, including embedded systems, such as PCs and peripherals, telecommunication switches, cellular phones, network interconnection equipment, instrumentation and automotive devices, as well as emerging voice, image, data Storage products such as digital cameras, digital voice recorders and personal digital assistants. [0003] In the current non-volatile memory, the bit line and the word line usually have an orthogonal structure, which helps to reduc...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768H01L21/8247
Inventor 金泰圭金钟雨
Owner SEMICON MFG INT (SHANGHAI) CORP