Packaging structure

Abstract

The invention discloses a packaging structure which comprises a circuit substrate, a chip, a plurality of solder balls, a switch intermediate layer and packaging colloid. The circuit substrate is provided with a top surface and a bottom surface which are opposite to each other, and also provided with a plurality of first joints on the bottom surface and a plurality of second joints on the top surface. The chip is configured on the top surface of the circuit substrate and electrically connected to the circuit substrate. The plurality of solder balls are configured on part of the second joints respectively and enclose the chip. The switch intermediate layer is configured on the chip and electrically connected to the circuit substrate, wherein one joint in the first joints and the second joints is electrically connected to another joint in the first joints and the second joints through the switch intermediate layer. The packaging colloid is configured on the top surface of the circuit substrate, and at least covers the chip and the switch intermediate layer.

Description

technical field [0001] The present invention relates to a packaging structure, and in particular to a stacked packaging structure. Background technique [0002] System-in-package technology (SIP) is a technology that integrates two or more chips with independent functions into a single package. Faster development speed and lower development cost than system-on-chip (SoC). [0003] Package on Package (POP) process is a common assembly method in system-in-package technology, which stacks packaging units of chips with different functions, for example, stacking memory chip packaging units on logic chip packaging units. [0004] However, with the advancement of process technology, the circuit integration and complexity of the packaging structure are increasing day by day. As far as the existing POP structure is concerned, based on its own structural characteristics, the space for line layout is severely limited, and the problem of mutual signal interference is also quite seriou...

AI Technical Summary

Problems solved by technology

[0004] However, with the advancement of process technology, the circuit integration and complexity of the packaging structure are increasing day by day.

As far as the existing POP structure is concerned, based on its own structural characteristics, the space for line layout is severely limited, and the problem of mutual signal interference is also quite serious

On the other hand, due to the interleaving of the lines, the number of layers of the circuit substrate increases, and the signals of adjacent lines are also prone to mutual interference.

Although the use of multi-layer boards can increase the margin of circuit layout, it also relatively causes a burden on production costs.

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