The invention relates to a readout circuit (100) for a capacitive sensor (120) comprising two capacitances (CS1, CS2), said circuit comprising: a
capacitance-to-
voltage converter (130) for converting, upon application of a
periodic excitation signal (Vexc), two periodic sensor signals (VS1, VS2) associated with said capacitances from the sensor into two amplified
voltage signals (Vout1, Vout2); an interference detection unit (140) for detecting an interference in one of the sensor signals; and a filter unit (150) configured to generate a reduced-interference measurement
signal (Vred) from an interference detection
signal (Vdet) from the interference detection unit and the
voltage signal, where the interference detection unit is configured to generate a reduced-interference measurement signal (Vred) when the
excitation signal is applied to the sensor. At least one of the sensor signals is evaluated by generating a filtered signal by applying a high-pass filter to the one sensor signal and / or a combination of the sensor signals, forming a non-negative signal from the filtered signal, the method includes receiving a non-negative signal, applying a
window function to the non-negative signal to weight a region of the non-negative signal, evaluating the weighted signal to detect interference, and generating and providing the interference detection signal based on the detected interference.