Semiconductor device and manufacturing method thereof
A device manufacturing method and semiconductor technology, which are applied in semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc., can solve problems such as the increase in the number of processes
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Embodiment 1
[0066] refer to Figures 1A to 19 A semiconductor device and a method of manufacturing the same according to Embodiment 1 are described.
[0067] (Semiconductor device)
[0068] First, refer to Figure 1A and Figure 1B as well as Figure 2A and Figure 2B The semiconductor device according to this embodiment is described. Figure 1A and Figure 1B is a cross-sectional view showing the semiconductor device according to the embodiment. Figure 1A The space on the left side of the middle shows the area where the transistors of the core components are formed (core transistor forming area) 2, Figure 1A The space on the right side of the center shows a region (input / output transistor forming region) 4 in which transistors of the input / output circuit are formed. Figure 1B A region (power amplifier circuit forming region) 6 where a power amplifier circuit is formed is shown. Figure 1B The space on the left side of the middle shows a region (pre-stage transistor formation regi...
Embodiment 2
[0307] refer to 36A to 40 A semiconductor device and a method of manufacturing the same according to Embodiment 2 are described. with the basis 1A to 35B The same components of the semiconductor device and the manufacturing method thereof of the first embodiment are denoted by the same reference numerals, and the description thereof will be omitted or simplified.
[0308] (Semiconductor device)
[0309] First, refer to Figure 36A and Figure 36B The semiconductor device according to this embodiment is described. Figure 36A and Figure 36B is a cross-sectional view showing the semiconductor device according to the embodiment.
[0310] The main feature of the semiconductor device according to this embodiment is that the P-type well 14e of the high withstand voltage transistor forming region 6B is not separated from the region where the low concentration drain region 28h is formed.
[0311] The P-type well 14e of the high withstand voltage transistor forming region 6B ...
Embodiment 3
[0342] refer to 41A to 43B A semiconductor device and a method of manufacturing the same according to Embodiment 3 are described. with the basis Figures 1A to 40 The same components of the semiconductor device and the manufacturing method thereof of the first embodiment and the second embodiment are denoted by the same reference numerals, and the description thereof will be omitted or simplified.
[0343] (Semiconductor device)
[0344] First refer to Figure 41A and Figure 41B The semiconductor device according to this embodiment is described. Figure 41A and Figure 41B is a cross-sectional view showing the semiconductor device according to the embodiment.
[0345] The main feature of the semiconductor device according to this embodiment is that the channel doping layer 22e of the high withstand voltage transistor forming region 6B is not separated from the region where the low concentration drain region 28h is formed.
[0346] With this embodiment, the channel dop...
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Abstract
Description
Claims
Application Information
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