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Method for detecting bottom outline of contact plug

A detection method and technology for contact plugs, which are used in semiconductor/solid-state device testing/measurement, electrical components, semiconductor/solid-state device manufacturing, etc., can solve problems such as inability to obtain photos and inability to obtain contact plug bottom contour detection results, etc. Achieve the effect of reducing charge capture effect, good test environment and reducing detection error

Active Publication Date: 2013-06-12
WUHAN XINXIN SEMICON MFG CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The detection process of using SEM to measure the wafer including the doped region 18 is as follows: firstly, the first dielectric layer 13 and the second dielectric layer 15 are removed by using an acid solution, and the metal layer 16 and the contact plug 14 are also removed thereupon, Since the contact plug 14 is partly located in the active region 12, it can be obtained as Figure 3B The shown SEM test sample including the opening 14a is finally tested by SEM, but because the depth of the opening 14a is small, the SEM still cannot obtain a clear photo, which leads to the inability to obtain an accurate bottom profile of the contact plug. Test results

Method used

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  • Method for detecting bottom outline of contact plug
  • Method for detecting bottom outline of contact plug
  • Method for detecting bottom outline of contact plug

Examples

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no. 1 example

[0042] refer to Figure 5A , first provide a wafer; the wafer includes: a semiconductor substrate 21 formed with an active region 22; a first dielectric layer 23 located on the semiconductor substrate 21; through the first dielectric layer 23 and with the active The contact plug 24 electrically connected to the source region 22; the second dielectric layer 25 formed on the first dielectric layer 23 and the contact plug 24; and penetrating through the second dielectric layer 25 and in contact with the Plug 24 is electrically connected to metal layer 26 .

[0043] Wherein, the material of the first dielectric layer 23 and the second dielectric layer 25 is one of silicon oxide or silicon nitride or a combination thereof, and the material of the contact plug 24 is tungsten, copper, or aluminum, The contact plug 24 may be a trapezoidal plug.

[0044] refer to Figure 5B , the metal layer 26 and the second dielectric layer 25 are removed by chemical mechanical polishing.

[0045...

no. 2 example

[0054] refer to Figure 6A , first provide a wafer; the wafer includes: a semiconductor substrate 31 formed with an active region 32; a first dielectric layer 33 located on the semiconductor substrate 31; through the first dielectric layer 33 and with the active The contact plug 34 electrically connected to the source region 32; the second dielectric layer 35 formed on the first dielectric layer 33; and the second dielectric layer 35 penetrating through and electrically connected to the contact plug 34 The metal layer 36.

[0055] In order to reduce contact resistance, the wafer also includes a metal silicide layer 37 formed in the active region 32, the contact plug 34 is electrically connected to the active region 32 through the metal silicide layer 37, the The metal silicide layer 37 can be made of cobalt silicide, titanium silicide or platinum silicide.

[0056] refer to Figure 6B , removing the metal layer 36 and the second dielectric layer 35 by means of chemical mech...

no. 3 example

[0063] refer to Figure 7A , first provide a wafer; the wafer includes: a semiconductor substrate 41 formed with an active region 42; a first dielectric layer 43 located on the semiconductor substrate 41; through the first dielectric layer 43 and with the active The contact plug 44 electrically connected to the source region 42; the second dielectric layer 45 formed on the first dielectric layer 43; and the second dielectric layer 45 penetrating through and electrically connected to the contact plug 44 The metal layer 46.

[0064] In order to reduce the contact resistance, the wafer may also include a doped region 47 formed in the active region 42, the contact plug 44 is partly located in the active region 42, and communicates with the doped region 47 through the doped region 47. The active region 42 is electrically connected, wherein the doped region 47 can be formed by ion implantation.

[0065] refer to Figure 7B , removing the metal layer 46 and the second dielectric l...

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Abstract

The invention provides a method for detecting the bottom outline of a contact plug, comprising the following steps of: providing a wafer, wherein the wafer comprises a semiconductor substrate with an active region, a first dielectric layer on the semiconductor substrate, the contact plug passing through the first dielectric layer and electrically connected with the active region, a second dielectric layer formed on the first dielectric layer and the contact plug, and a metal layer passing through the second dielectric layer and electrically connected with the contact plug; removing the metal layer and the second dielectric layer; removing a part of the first dielectric layer in a manner of dry etching; removing the contact plug so as to form a detection sample wafer; and using a scanning electron microscope to detect the detection sample wafer. In the invention, a clear picture of the bottom outline of the contact plug can be obtained by using the scanning electron microscope, and a precise detection result is obtained.

Description

technical field [0001] The invention relates to the field of integrated circuit manufacturing, in particular to a method for detecting the bottom profile of a contact plug. Background technique [0002] With the rapid development of the information industry, the demand for processing a large amount of information is increasing. Therefore, the demand for information storage media that can store a large amount of information is also increasing, and the manufacturing process of the contact plug of the storage device is also proposed. The requirements of the requirements, the profile (profile) and size (Critical Dimension, CD) of the contact plug must meet the requirements accurately, otherwise it will lead to abnormal contact resistance (Rc), which will affect the yield of the product. [0003] In order to ensure that the contact resistance of the semiconductor device meets the requirements, the industry often uses a transmission electron microscope (Transmission Electron Micro...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/66H01L21/768
Inventor 黄雪青林岱庆何永谢振
Owner WUHAN XINXIN SEMICON MFG CO LTD