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Method for manufacturing fine patterns on semiconductor device

A technology of fine patterns and fabrication methods, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., and can solve problems such as fine pattern limitations

Active Publication Date: 2013-04-24
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0002] With the continuous shrinking of the size of semiconductor devices, the feature size of lithography is gradually approaching or even exceeding the physical limit of optical lithography, that is, it is impossible to obtain semiconductor patterns with smaller sizes by using existing lithography equipment. It is lithography that poses a more serious challenge
Therefore, in the photolithography process for forming the line (line) and space (space) pattern on the substrate, due to the limitation of photolithography technology, there is a limit to the formation of the desired smaller-sized fine pattern

Method used

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  • Method for manufacturing fine patterns on semiconductor device
  • Method for manufacturing fine patterns on semiconductor device
  • Method for manufacturing fine patterns on semiconductor device

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Embodiment Construction

[0025] In order to make the object, technical solution, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and examples.

[0026] The core idea of ​​the present invention is to increase the limit of lithography by adopting double patterning technology without changing the existing lithography infrastructure. The so-called double-patterning technology mainly uses the mask pattern formed twice to etch and transfer the mask pattern to the target layer. For the fine pattern with line and space, by the method of the present invention, a repeated fine pattern with pitch (pitch)=line+space is formed.

[0027] The schematic flow chart of the method for making fine patterns in the present invention is as figure 1 As shown, it includes the following steps, which are combined below Figure 1a to Figure 1g Be explained.

[0028] Step 11, see Figure 1a , deposit an etching target ...

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Abstract

The invention provides a method for manufacturing fine patterns on a semiconductor device. The method comprises the following steps: taking a patterned light resistance adhesive layer as first masking patterns; oxidizing polycrystalline silicon or noncrystalline silicon; and adopting silicon oxides as second masking patterns, and transferring repeated fine patterns to a target layer, thus formingsmall-sized fine patterns. On the premise of keeping existing photoetching infrastructures unchanged, the limit of the photoetching is increased.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for manufacturing fine patterns of semiconductor devices. Background technique [0002] With the continuous shrinking of the size of semiconductor devices, the feature size of lithography is gradually approaching or even exceeding the physical limit of optical lithography, that is, it is impossible to obtain semiconductor patterns with smaller sizes by using existing lithography equipment. It is photolithography that poses a more serious challenge. Therefore, in a photolithography process for forming line and space patterns on a substrate, there is a limit to forming a desired smaller-sized fine pattern due to limitations of photolithography technology. Contents of the invention [0003] In view of this, the technical problem to be solved by the present invention is: to form fine patterns of smaller size. [0004] In order to solve the problems of...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/027H01L21/32
Inventor 洪中山
Owner SEMICON MFG INT (SHANGHAI) CORP