Semiconductor device cover mark
A manufacturing method and semiconductor technology, applied in the fields of semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems such as misalignment, failure of communication between semiconductor chips and substrates, unconnected power lines and signal lines, etc. , to achieve the effect of reducing misalignment
Active Publication Date: 2012-02-08
TAIWAN SEMICON MFG CO LTD
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- Description
- Claims
- Application Information
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Problems solved by technology
[0004] Furthermore, since the semiconductor chip is flipped before being placed on the substrate, it is difficult to precisely align the solder balls with the corresponding connection points on the underlying substrate
This problem creates misalignment between the semiconductor chip and the substrate, which can lead to unconnected power lines or failed signal lines, and worst of all, complete failure of communication between the semiconductor chip and substrate
Method used
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[0043] The manufacture and use of the embodiments of the present invention are described below. It should be readily appreciated, however, that the embodiments of the invention provide many suitable inventive concepts that can be implemented in a wide variety of specific contexts. The disclosed specific embodiments are only used to illustrate the making and use of the present invention in specific ways, and are not intended to limit the scope of the present invention.
[0044] The present embodiment is described below against a specific background, namely, masking marks for semiconductor chips having a flip-chip configuration. However, these embodiments are also applicable to other types of markers.
[0045] Please refer to Figure 1A and Figure 1B , which respectively show a cross-sectional and plan view of a semiconductor substrate 101, a substrate 103, and a contact bump (bump) 105 with a flip-chip configuration, wherein Figure 1A is shown along Figure 1B The cross-...
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A system and method for determining underfill expansion is provided. An embodiment comprises forming cover marks along a top surface of a substrate, attaching a semiconductor substrate to the top surface of the substrate, placing an underfill material between the semiconductor substrate and the substrate, and then using the cover marks to determine the expansion of the underfill over the top surface of the substrate. Additionally, cover marks may also be formed along a top surface of the semiconductor substrate, and the cover marks on both the substrate and the semiconductor substrate may be used together as alignment marks during the alignment of the substrate and the semiconductor substrate.
Description
technical field [0001] The present invention relates to a semiconductor manufacturing system and method, in particular to a system and method for providing a cover mark on a semiconductor chip. Background technique [0002] Semiconductor devices, such as semiconductor chips, can be attached to a substrate using flip-chip technology. In this process, a series of connectors, such as solder balls, are formed on one side of a semiconductor chip, and the semiconductor chip is then flipped so that the solder balls make contact with the underlying substrate. A reflow process is then performed to reflow the solder balls to form the necessary electrical connections between the semiconductor chip and the underlying substrate. Then, an underfill material is filled between the semiconductor chip and the substrate to provide mechanical and chemical protection to the reflowed solder balls. [0003] In some examples, the primer material not only seals the area between the semiconductor c...
Claims
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Patent Timeline
Login to View More IPC IPC(8): H01L23/544H01L21/50H01L21/56
CPCH01L21/563H01L23/49838H01L23/544H01L24/11H01L24/81H01L2223/54413H01L2223/5442H01L2223/54426H01L2223/54473H01L2223/5448H01L2223/54486H01L2224/1132H01L2224/11334H01L2224/1145H01L2224/11462H01L2224/11849H01L2224/131H01L2224/73204H01L2224/8113H01L2224/81132H01L2224/81191H01L2224/81815H01L2924/01013H01L2924/01029H01L2924/01079H01L2924/01082H01L2924/01005H01L2924/01006H01L2924/01033H01L2924/01047H01L2924/0105H01L2924/014H01L2224/13111H01L2224/13124H01L2224/13139H01L2224/13144H01L2224/13147H01L2224/13155H01L2924/0001H01L2924/351H01L2224/16227H01L2924/00014H01L2224/13099H01L2924/00
Inventor 林彦甫林俊成邱文智郑心圃余振华
Owner TAIWAN SEMICON MFG CO LTD