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Digital predistortion algorithm system suitable for hardware realization

A technology of digital pre-distortion and hardware implementation, which is applied in general control system, control/adjustment system, adaptive control, etc., can solve the problem of transmitter power reduction and achieve the effect of simple cost and small hardware structure

Inactive Publication Date: 2012-02-15
FUDAN UNIV
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If people simply use the power back-off technology to reduce the power of the input signal, although the required linearity can be obtained, the power of the transmitter will be greatly reduced

Method used

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  • Digital predistortion algorithm system suitable for hardware realization
  • Digital predistortion algorithm system suitable for hardware realization
  • Digital predistortion algorithm system suitable for hardware realization

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Embodiment Construction

[0017] According to the content of the present invention, the specific implementation of the pre-distortion algorithm suitable for hardware implementation is as follows:

[0018] 1. Predistortion module

[0019] The pre-distortion module is mainly composed of two look-up tables and a complex multiplier. They are used to correct IQ two ways respectively. if defined is the input signal vector, For the PA (power amplifier) ​​amplification characteristics when the input amplitude is r(n), put Defined as the predistortion characteristics that should be stored in the LUT (look-up table) when the input amplitude is r(n), then the desired final signal is:

[0020] (1)

[0021] K is the amplification constant, abs (*) indicates the absolute value of *, within a certain range, the higher the LUT accuracy, The more accurate, the better the pre-distortion effect, but the accuracy required by the LUT is limited by the accuracy of the analog-to-digital converter ...

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Abstract

The invention belongs to the technical field of simulated and mixed signal integrated circuits, in particular to a digital predistortion algorithm system suitable for hardware realization. The algorithm system consists of a predistortion module, a predistortion lookup table updating module, a loop circuit delay estimation module and a loop circuit phase rough rotation compensation module. The digital predistortion algorithm system mainly corrects a nonlinear component in an emitter so as to suppress the influence of adjacent channel extension on communication quality. The digital predistortion algorithm system can well meet a requirement of the emitter on a protocol adjacent channel power ratio (ACPR) and is suitable for hardware realization; therefore, an effect of improving the nonlinearity of the emitter is achieved at lower cost.

Description

technical field [0001] The invention belongs to the technical field of analog and mixed-signal integrated circuits, and in particular relates to a digital pre-distortion algorithm system suitable for hardware implementation to compensate nonlinear elements in transmitters. Background technique [0002] The power amplifier is an indispensable component in the communication system, and it is also the component with the worst nonlinearity. Nonlinearities cause spectral broadening, which affects the incoming signal. At the same time, it will also cause distortion of the signal inside the bag, which will increase the bit error rate of the receiver. Transmission formats in recent years, such as WCDMA (Wideband Code Division Multiple Access mobile communication system) or OFDM (Orthogonal Frequency Division Multiplexing), due to higher PAPR (signal power peak-to-average ratio), the distortion caused by nonlinear Very sensitive. If people simply use the power back-off technology ...

Claims

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Application Information

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IPC IPC(8): G05B13/04
Inventor 董传盛曾真李亨刘毅
Owner FUDAN UNIV
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