33 results about "Adjacent channel power ratio" patented technology

Embodiments of methods, transmitters, and computer program products are provided for transmitting a signal by adjusting a delay between an amplitude component of the signal and a phase component of the signal based on the transmission power. Error vector magnitude and adjacent channel power ratio are two common criteria used in evaluating transmitter performance. By adjusting the delay between the amplitude component of the transmitted signal and the phase component of the transmitted signal, the error vector magnitude and/or the adjacent channel power ratio may be reduced. The particular delay value that provides the best error vector magnitude performance and/or adjacent channel power ratio performance may differ based on the transmission power level. Therefore, the delay value is adjusted based on the transmission power.

The embodiment of the invention provides a design method for a cascade filter, which comprises the following steps of: determining the interpolation times N of the filter; calculating the filter coefficient of a programmable finite impulse response (PFIR) filter, and obtaining a design scheme of a cascade combined filter of PFIR and cascaded integrator comb (CIC) filters; and when the interpolation times of the cascade combined filter of the PFIR and CIC filters does not reach the predetermined times, designing a half band (HB) filter, so that the filter performance of the cascade combined filter of the PFIR and CIC filters and the HB filter meets the interpolation times requirement of a system, and the design of the PFIR filter is realized by adopting a multistage design scheme. According to the embodiment provided by the invention, by adopting the design device for the multistage filter, the order of the designed filter is in a realizable range of the FPGA, and the indexes such as interpolation times of signals, error vector magnitude (EVM), adjacent channel power ratio (ACPR) and the like can meet the protocol requirement. Moreover, according to the technical scheme provided bythe invention, the resource consumption of the filter is also lower than that of the design method for the traditional filter, and the use of FPGA hardware resources can be effectively reduced.

A system for detecting a broadcast channel in a radio receiver includes a receive signal strength indicator (RSSI) element configured to develop an RSSI signal that is representative of a power in a desired channel, a switchable bandwidth channel select filter having a power detector configured to compare a power output of the desired channel and at least one channel adjacent to the desired channel to develop a signal to adjacent channel power ratio (SACPR) signal that is representative of the noise in the desired channel, and a seek element configured to determine whether the RSSI signal is greater than a predetermined RSSI threshold and configured to determine whether the SACPR signal is greater than a predetermined SACPR threshold.

The invention aims at providing a method and a device for obtaining signals with low peak-to-average power ratio based on error vector magnitude. The radio remote unit receives one channel or multi-channel carrier signals. An adjustment factor of the one-channel or multi-channel carrier signals is obtained according to expected error vector magnitude of the one-channel or multi-channel carrier signals. Peak compensation signals of the channel or multi-channel carrier signals are generated according to the adjustment factor. Peak compensation processing is conducted according to the peak compensation signals so as to obtain the signals with low peak-to-average power ratio. Compared with the prior art, the adjustment factor is adjusted based on the error vector magnitude, the signals with low peak-to-average power ratio are obtained, requirements of expected error vector magnitude (EVM) and peak-to-average power ratio (PAPR) are met, and furthermore, index requirements of adjacent channel leakage power ratio (ACLR) are met.

The embodiment of the invention discloses a power amplifier and a signal processing method, and relates to the field of mobile communication. The power amplifier comprises a pulse modulator, a level adjustor and an amplitude power amplifier. The embodiment of the invention also provides a signal processing method. The method is that: signals processed by at least one integrator and the signals subjected to quantitative processing in the pulse modulator are the signals obtained by respectively subtracting a level adjusting value from preset high and low level values in the pulse modulator; because the level adjusting value is obtained by dividing a saturation level value of the amplitude power amplifier by a level amplification factor, a saturation level generated by the amplitude power amplifier is generated; a carrier leakage phenomenon caused by the saturation level of the amplitude power amplifier in the conventional power amplifier used for transmitting radio-frequency signals is avoided; therefore, linear indexes such as an adjacent channel power ratio (ACPR) of the power amplifier are greatly improved; and the distortion of the signals is reduced.

The invention discloses a power amplifier pre-distortion method for a complex-valued pipeline recurrent neural network model. The power amplifier pre-distortion method comprises the steps: carrying out the modeling of a power amplifier behavior model through the complex-valued pipeline recurrent neural network model, solving a pre-distorter module, and carrying out the pre-distortion operation ofa power amplifier input signal, and specifically includes the steps: firstly, part of input and output signals of a power amplifier are used as test signals, and forward modeling is conducted on the power amplifier, and the model weight is optimized through an enhanced complex value real-time recursive learning algorithm, and the optimal model weight is obtained, and the nonlinear and memory capacity of the power amplifier represented by the model is checked; secondly, inversion is performed on the model so as to perform reverse modeling on the power amplifier to obtain a predistorter structure; and finally, the input signal of the power amplifier obtains a signal subjected to pre-distortion compensation through the predistorter structure, and sends the signal into the power amplifier, sothat the adjacent channel power ratio of the output signal of the power amplifier obtained at the moment can be remarkably improved.

The invention discloses a circuit and a method for reducing radio frequency power consumption of mobile phone, wherein a baseband processing chip (21) adjusts a base bias voltage and/or a collector bias voltage of a radio frequency power amplifier (23) according to radio frequency power output of the radio frequency power amplifier (23). Since the invention reduces the radio frequency output power of the radio frequency power amplifier (23) by moderately reducing the base bias voltage and/or the collector bias voltage at the same time when it is ensured that the mobile phone communicates with a base station normally and the linear index and the Adjacent Channel Power Ratio (ACPR) of the radio frequency power amplifier (23) meet the requirements of the specification, thus the efficiency of the radio frequency power amplifier can be improved, the battery energy is saved and the heating problem of the mobile phone is relieved.

The invention discloses a 10W multicarrier power amplifier applied to a 5G system base station. The 10W multicarrier power amplifier comprises an input/output circuit, a power amplifier circuit, a lownoise amplifier circuit and a radio frequency switch control circuit. The low noise amplifier circuit and the power amplifier circuit control time division working through utilization of the radio frequency switch control circuit. In order to satisfy a requirement of an adjacent channel power ratio (ACPR) and realize the fact that plenty of margin exist, an existing mature predistortion technology is employed. When an output power of the power amplifier is 10W, +/-1.6MHz out-of-band rejection is smaller than or equal to -46dBc, and +/-3.2MHz out-of-band rejection is smaller than or equal to -51dBc. Through high and low temperature experiments, stability and reliability experiments and an HALT experiment, the power amplifier provided by the invention is low in power consumption, total working efficiency is 11%-12%, the requirement of the adjacent channel power ratio (ACPR) is satisfied, working efficiency is high, and reliable and stable working of the power amplifier circuit and the low noise amplifier circuit is guaranteed.

The invention provides a communication device with power amplifier crest factor reduction. Various embodiments include a power amplifier with crest factor reduction embodied by first circuitry for producing a correlated out-of-band noise signal for controlling the adjacent channel leakage ratio (ACLR) of a communication device; and second circuitry for providing an output signal for controlling the error vector magnitude (EVM) of a digital radio. The ACLR and the EVM are concurrently individually controllable. Additional apparatus is described.

The invention discloses a digital pre-distortion (DPD) parameter monitoring device and method. The device is connected with a DPD parameter obtaining module and a PDP processing module respectively, is used for rectifying the correctness and effectiveness of PDP parameters obtained by the DPD parameter obtaining module and outputs the PDP parameters passing the correctness verification and effectiveness verification to the PDP processing module for PDP processing. By adopting the device and method provided by the invention, the PDP parameters obtained by the DPD parameter obtaining module can be monitored, the stability and reliability of the DPD parameters for pre-distortion are ensured, and the stability of adjacent channel power ratio (ACPR) index of a power amplifier output signal can be further ensured.

The invention belongs to the technical field of simulated and mixed signal integrated circuits, in particular to a digital predistortion algorithm system suitable for hardware realization. The algorithm system consists of a predistortion module, a predistortion lookup table updating module, a loop circuit delay estimation module and a loop circuit phase rough rotation compensation module. The digital predistortion algorithm system mainly corrects a nonlinear component in an emitter so as to suppress the influence of adjacent channel extension on communication quality. The digital predistortion algorithm system can well meet a requirement of the emitter on a protocol adjacent channel power ratio (ACPR) and is suitable for hardware realization; therefore, an effect of improving the nonlinearity of the emitter is achieved at lower cost.

The invention discloses a screening method of a digital pre-distortion sample. The screening method comprises the following steps: receiving a base station system message and acquiring screening parameters corresponding to the base station system message; and screening data streams transmitted by a base station according to the screening parameters to obtain a first digital pre-distortion sample. The invention further discloses a screening device of the digital pre-distortion sample. With the adoption of the screening method and device of the digital pre-distortion sample, the stability of an ACPR (Adjacent Channel Power Ratio) index of an output signal of a power amplifier can be guaranteed.

The invention discloses a method for reducing an adjacent channel power ratio based on a CIC filter and the CIC filter. The method comprises the steps of inputting a data signal into the CIC filter, wherein a comb filter of the CIC filter outputs data; generating an integral pulse cic_inter_fs and interpolating the data signal through an interpolation module; controlling the comb filter to output switching of data and ''0'' interpolation by combined logic, if the cic_inter_fs is equal to '0 ', interpolating ''0'' value, and inputting full 0 data by an integrator; if the cic_inter_fs is equal to '1 ', inputting the output data of the comb filter by the integrator; and if the ''0'' value is interpolated, calculating data bit width through a bit width control packet module, and outputting the data by the integrator. According to the method for reducing the adjacent channel power ratio based on the CIC filter and the CIC filter provided by the invention, a CIC algorithm is realized through logic, so the adjacent channel power ratio (ACPR) of a reader reaches a protocol standard, and the reading efficiency of an external filed application of the reader is not reduced.