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Scheduling system and scheduling execution method of multi-core heterogeneous system on chip

A heterogeneous system and scheduling system technology, applied in multi-programming devices, resource allocation, etc., can solve problems such as limiting platform performance optimization effects, and achieve the effect of eliminating WAR pseudo-correlation

Active Publication Date: 2013-12-18
SUZHOU INST FOR ADVANCED STUDY USTC
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In general, the task division and scheduling method in the task parallel scheduling method in the current parallel programming model requires manual intervention and configuration by the programmer, which limits the performance optimization effect that the platform can obtain

Method used

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  • Scheduling system and scheduling execution method of multi-core heterogeneous system on chip
  • Scheduling system and scheduling execution method of multi-core heterogeneous system on chip
  • Scheduling system and scheduling execution method of multi-core heterogeneous system on chip

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Experimental program
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Embodiment

[0030] Such as figure 1As shown, the task scheduling system of the on-chip multi-core computing platform includes a user service module that provides tasks that need to be executed, and a computing service module that executes multiple tasks on the on-chip multi-core computing platform. A core is set between the user service module and the computing service module. The scheduling module, the core scheduling module accepts the task request from the user service module as input, judges the data dependencies between different tasks through records, and schedules the task requests to different computing service modules in parallel for execution.

[0031] figure 2 It shows the system architecture diagram of the task scheduling system of the on-chip multi-core computing platform. The modules include a task queue, a variable state table, a set of reservation stations and a re-request buffer table. The specific modules are as follows:

[0032] 1) task queue

[0033] The task queue ...

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Abstract

The invention discloses a scheduling system and a scheduling execution method of a multi-core heterogeneous system on chip. The scheduling system comprises a user service module which provides tasks needed to be executed and is suitable for a plurality of heterogeneous software and hardware, and a plurality of computing service modules for executing a plurality of tasks on a multi-core computing platform on chip; the scheduling system is characterized in that a core scheduling module is arranged between the user service module and the computing service modules, and the core scheduling module is used for accepting a task request of the user service module, recording and judging a data dependence relation among different tasks to schedule the task request to different computing service modules for execution in parallel; the computing service modules are packaged as IP (Internet Protocol) cores, and realize dynamic loading of the IP cores via a reconfigurable controller; and the computing service modules are in on chip interconnections with a plurality of computing processors of the multi-core heterogeneous system on chip, and accept instructions of the core scheduling module to execute different types of computing tasks. The scheduling system improves the platform throughput rate and the system performance by monitoring the relativity of the tasks and executing automatic parallelization in the running process.

Description

technical field [0001] The invention belongs to the technical field of scheduling of multi-core computing platforms on a chip, and in particular relates to a task scheduling system of a multi-core computing platform on a chip and a method for executing tasks out of sequence. Background technique [0002] On-chip multi-core processors have become the research and development direction of multi-core processors. With the development of semiconductor technology, more and more resources can be integrated on a chip. On-chip multi-core systems, especially heterogeneous multi-core systems, can take advantage of different computing units and accelerate the performance of different embedded applications. A computing system adopting a heterogeneous architecture can utilize multiple computing modes at the same time, and can give full play to the advantages of different computing modes in different application fields. Therefore, integrating various feasible computing modes in a chip wil...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F9/46G06F9/50
Inventor 周学海李曦王超陈鹏陈香兰冯晓静张军能王爱立
Owner SUZHOU INST FOR ADVANCED STUDY USTC
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