Substrate processing apparatus and substrate processing method

Abstract

The present disclosure relates to a substrate processing apparatus and a substrate processing method suppressing deterioration of a throughput when a module forming a multi-component is disabled. When a module is disabled, a substrate is provided to a carry-in module capable of placing the wafers most rapidly in the plurality of unit blocks and the substrates are sequentially transported to the module group by the transportation means to be delivered to the carry-out module according to a providing sequence of the substrate to the carry-in module in each of the plurality of unit blocks. In particular, the substrates are extracted from the carry-out module according to a providing sequence of the substrate to the carry-in module and transported to a rear module or a substrate placing part. Thereafter, the substrates are transported to the rear module from the carry-out module or the substrate placing part according to a predetermined sequence in which the substrate is provided to the carry-in module in a normal state.

Description

technical field [0001] The present invention relates to a method for supplying a treatment liquid to the surface of a substrate such as a semiconductor wafer or an LCD substrate (glass substrate for a liquid crystal display) to perform predetermined substrate treatment, such as application of a resist solution, development treatment after exposure, etc. A substrate processing device and a substrate processing method. Background technique [0002] In the photoresist process, which is one of the semiconductor manufacturing processes, a resist is applied to the surface of a semiconductor wafer (hereinafter referred to as a wafer), and the resist is exposed in a predetermined pattern, followed by Develop to form a resist pattern. In the coating-developing apparatus for forming the above-mentioned resist pattern, there is provided a processing section including processing components and the like for performing various processing on a wafer. [0003] As described in, for example...

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Problems solved by technology

[0006] However, in one single area among a plurality of single areas that perform the same process, one of the multiple units constituting the multi-unit may be unusable due to failure, maintenance, etc.

At this time, there is such a problem that not only the operation rate of the module is lowered in the single block where the unusable module that cannot be used is generated, so the productivity is lowered, but also when the wafer is sequentially delivered to a plurality of single blocks as described above, In addition, in the structure in which processed wafe

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