Memory system, host controller and dma control method

A host controller and memory system technology, applied in memory systems, instruments, data processing input/output process, etc., can solve problems such as performance degradation, and achieve the effect of efficient data transmission

Active Publication Date: 2012-04-11
KIOXIA CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Therefore, even if a high-speed bus is used, there is a problem of performance degradation due to the influence of driver processing latency

Method used

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  • Memory system, host controller and dma control method
  • Memory system, host controller and dma control method
  • Memory system, host controller and dma control method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0017] Embodiments will be described below with reference to the drawings. ADMA described below represents an improved version of ADMA improved from this proposal.

[0018] figure 1 The memory system of this embodiment is schematically shown.

[0019] In this embodiment, by expanding the descriptors that enable data transfer in the system memory, the host controller can issue a plurality of SD commands during the DMA transfer, thereby reducing the processing overhead of the host driver.

[0020] figure 1 A system controller 11 is shown controlling the interfaces with CPU 12 , system memory 13 and SD host controller 14 .

[0021] The system memory 13 stores a host driver 21 , a descriptor table 22 and data 23 . Areas required for storing the host driver 21 , descriptor table 22 and data 23 are secured on the system memory 13 by the operating system (OS).

[0022] The host driver 21 is, for example, a driver specific to the OS for the SD host controller 14 and is executed b...

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PUM

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Abstract

According to one embodiment, the host controller includes a register set to issue command, and a direct memory access (DMA) unit and accesses a system memory and a device. First, second, third and fourth descriptors are stored in the system memory. The first descriptor includes a set of a plurality of pointers indicating a plurality of second descriptors. Each of the second descriptors comprises the third descriptor and fourth descriptor. The third descriptor includes a command number, etc. The fourth descriptor includes information indicating addresses and sizes of a plurality of data arranged in the system memory. The DMA unit sets, in the register set, the contents of the third descriptor forming the second descriptor, from the head of the first descriptor as a start point, and transfers data between the system memory and the host controller in accordance with the contents of the fourth descriptor.

Description

technical field [0001] The present invention relates to applications such as Secure Digital (SD TM ) card, a host controller with Advanced Direct Memory Access (ADMA), a memory system, and a control method for DMA. Background technique [0002] Recently, SD cards such as SD memory cards are widely used in cellular phones, digital cameras, and the like as host devices. The SD card is connected to the host device via the host controller, and the data transmission between the host device and the SD memory card is controlled by the host controller. [0003] The system memory provided in the host device is managed by paging. Therefore, data on the system memory is managed in fragments in units of pages. [0004] In order to efficiently read / write data to / from the memory card, the host controller is provided with a DMA, and the DMA is enabled to perform data transfer managed in units of pages. That is, by using a descriptor as a data transfer list, it is possible to perform DM...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/28
CPCG06F2213/28G06F13/28G06F3/00G06F12/1081
Inventor 藤本曜久
Owner KIOXIA CORP
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