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Metal interconnecting structure and methods for forming metal interlayer through holes and interconnecting metal wire

A technology of metal layer and seed crystal layer, which is applied in the direction of semiconductor/solid-state device parts, semiconductor devices, electrical components, etc., and can solve problems such as holes, difficult coverage, and disconnection

Active Publication Date: 2014-06-25
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0008] In addition, as the aspect ratio of the trench gradually increases, it becomes more and more difficult for the second barrier layer 32 and the first copper layer 42 to adhere to the sidewall of the trench, so that the electroplating cannot be formed. The required continuous seed layer, in other words, the second barrier layer 32 and the first copper layer 42 are more and more difficult to cover the sidewall, bottom wall of the trench and the first layer embedded with the trench. The second dielectric layer 40, so that the electroplating of copper cannot be carried out in the lower part of the trench, resulting in holes or even disconnection

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  • Metal interconnecting structure and methods for forming metal interlayer through holes and interconnecting metal wire
  • Metal interconnecting structure and methods for forming metal interlayer through holes and interconnecting metal wire
  • Metal interconnecting structure and methods for forming metal interlayer through holes and interconnecting metal wire

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Embodiment Construction

[0034] The following disclosure provides many different embodiments or examples to implement the technical solutions provided by the present invention. Although the components and settings of specific examples are described below, they are merely examples and are not intended to limit the present invention.

[0035] In addition, the present invention may repeat reference numbers and / or letters in different embodiments. This repetition is for the purpose of simplification and clarity and does not in itself indicate the relationship between the various embodiments and / or settings discussed.

[0036] The present invention provides examples of various specific processes and / or materials. However, alternative applications of other processes and / or other materials that can be realized by those skilled in the art obviously do not depart from the scope of protection of the present invention. It should be emphasized that the boundaries of the various areas described in this document includ...

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Abstract

A method for forming through-holes between metallization layers includes: forming a seed layer (140) on a first dielectric layer (100) and a first metal layer (120). The first metal layer (120) is embedded in the first dielectric layer (100). A mask pattern (160) is formed on the seed layer (140). The mask pattern (160) exposes part of the seed layer (140). The exposed seed layer (140) covers part of the first metal layer (120). A second metal layer (142) is grown on the exposed seed layer (140). The mask pattern (160) and the seed layer (140) carrying the mask pattern (160) are removed, so that the sidewall of the second metal layer (142), part of the first metal layer (120) and the first dielectric layer (100) are exposed. A barrier layer is formed on the sidewall of the second metal layer (142), part of the first metal layer (120) and the first dielectric layer (100). A method for forming interconnect metallization lines is provided. The two methods both can reduce the generation of holes. A metal interconnection structure includes contact plugs, through holes and interconnect metallization lines. The through holes are formed on the interconnect metallization lines, the metal gate and / or the contact plugs.

Description

Technical field [0001] The present invention relates to the field of semiconductor technology, in particular to a method for forming a metal interconnection structure and inter-metal via holes and interconnection metal lines. Background technique [0002] In practice, a damascene process is generally used in the industry to form a metal interconnection structure. The metal interconnection structure includes generating interconnection metal lines on the contact plugs, generating vias on the interconnection metal lines, and then generating a higher layer on the vias. Interconnect metal lines. Repeat many times to realize multi-metal layer interconnection. [0003] Among them, the first-level interconnection metal lines are realized by a single damascene process, and the steps include: First, such as figure 1 As shown, a first barrier layer 30 and a second dielectric layer 40 are formed on the first dielectric layer 20 and the first metal layer 10 (in practice, there is also a gap be...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768H01L23/528
CPCH01L21/76873H01L21/76885H01L23/53295H01L21/76834H01L2924/0002
Inventor 赵超
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI