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Photoetching method

A technology of lithography and photoresist, applied in the field of lithography, can solve problems such as high cost and affecting production progress, and achieve the effect of avoiding diffusion

Active Publication Date: 2013-11-06
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Abstract
  • Description
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AI Technical Summary

Problems solved by technology

The cost of the above-mentioned layout correction and re-lithography process is very high, and at the same time affects the production schedule

Method used

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Embodiment Construction

[0025] In the existing photolithography process, when the photoresist pattern on the wafer surface collapses due to layout design problems, the photoresist pattern can only be re-made and the unqualified pattern on the layout can be corrected. Therefore, the cost is higher and the production schedule is affected.

[0026] In an actual production process, one wafer is used to manufacture multiple chips, so the wafer is divided into multiple repeated chip regions. If the photoresist pattern collapses due to the design problem of the test pattern on the reticle, the pattern in the collapsed area does not have any impact on the chip function; even if the photoresist pattern is caused by the design problem of the device pattern on the reticle The collapse of the glue pattern also affects only a limited number of chips. Assuming that the above-mentioned area where the pattern collapse occurs is shielded, the rest of the wafer can still perform normal photolithography processes.

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Abstract

The invention provides a photoetching method which comprises the steps of: providing a testing wafer; photoetching the testing wafer by using a design mask to form a photoresist pattern on the surface of the testing wafer; detecting the photoresist pattern, and searching a region having pattern sinks; making a correction mask according to the sunk region of the photoresist pattern, wherein the correction mask has an opening, and the opening is corresponding to the pattern sink region; providing a product wafer; and exposing the product wafer by respectively using the correction mask and the design mask to form a photoresist pattern on the surface of the product wafer. By exposing the photoresist pattern having pattern sinks twice, the photoresist pattern of the region fails, so that the expansion of the photoresist defect is avoided.

Description

technical field [0001] The invention relates to an integrated circuit manufacturing process, in particular to a photolithography method. Background technique [0002] In the manufacturing process of integrated circuits, the preparation of chips is generally divided into steps such as thin film, grinding, photolithography, etching, diffusion and doping. Among them, the photolithography technology dissolves some areas on the photoresist through steps such as exposure, development, fixing, and hardening to form a photoresist mask with a layout pattern. Etching is a technique of transferring the pattern of the photoresist mask to the silicon wafer, which is used to etch and remove the surface material of the silicon wafer that is not protected by the photoresist. [0003] With the shrinking of the device feature size, the challenges to the minimum line width and precision of the photolithography process are also increasing. Technicians need to formulate various rules on the la...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G03F7/20G03F7/00H01L21/027
Inventor 单朝杰胡华勇
Owner SEMICON MFG INT (SHANGHAI) CORP
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