Frame buffer scheduling device and frame buffer scheduling method for infrared real-time imaging system

Abstract

The invention discloses a frame buffer scheduling device and a frame buffer scheduling method for an infrared real-time imaging system. The device comprises a scheduling device initial unit, a reading buffer scheduling unit, a writing buffer scheduling unit and a scheduling device recovery unit. The scheduling device initial unit is used for buffering scheduling device units corresponding to initializing to enable the scheduling to be used. The reading buffer scheduling unit is used for distributing readable buffer for reading operation and returning linked list node information correspondingto reading operation buffer to an applicant. The writing buffer scheduling unit is used for distributing buffer for writing operation and returning linked list node information corresponding to the distributed buffer to the applicant. The scheduling device recovery device is used for inserting linked list nodes corresponding to read or written buffer into correct linked lists. Buffer can be managed according to conditions of the buffer, and new frame buffer is always written in when buffer capable of writing in infrared frame buffer data exists.

Description

technical field [0001] The invention relates to the technical field of infrared image acquisition, in particular to a frame buffer scheduling device and a corresponding scheduling method in an infrared real-time imaging system. Background technique [0002] The infrared image data collected by the infrared real-time imaging system is usually uncompressed, the data volume is large, and further processing such as correction and stretching is required to display the video image; therefore, the reading and processing of the infrared image consumes a lot of system hardware resource. An infrared imaging system design scheme is to collect the infrared data of the uncooled focal plane through the FPGA, and then perform image processing such as non-uniform correction and stretching in the FPGA with the parameters provided by the host computer (such as an ARM chip), and finally inform the host through an interrupt The upper computer reads and displays the data; the upper computer rea...

AI Technical Summary

Problems solved by technology

[0005] (2) When there is no free image cache, the traditional array-based queue scheduling algorithm cannot guarantee that the latest infrared frame data can always replace the old infrared data that has not been read

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