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Method for increasing BCH (Broadcast Channel) error correcting speed and solid hard disk

A solid-state hard disk and error correction algorithm technology, applied in the storage field, can solve the problems of lowering the working frequency, reducing the BCH error correction speed, and reducing the bandwidth, etc., and achieves the effect of improving the working speed, improving the reading and writing performance, and increasing the working frequency.

Active Publication Date: 2015-07-08
RAMAXEL TECH SHENZHEN
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  • Application Information

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Problems solved by technology

These are the BCH implementation methods currently used in solid-state hard disks. The BCH encoding and decoding LFSR implemented by these methods has a long critical path, resulting in a decrease in operating frequency, bandwidth, and BCH error correction speed.
[0005] In summary, the existing BCH error correction technology obviously has inconvenience and defects in actual use, so it is necessary to improve it

Method used

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  • Method for increasing BCH (Broadcast Channel) error correcting speed and solid hard disk
  • Method for increasing BCH (Broadcast Channel) error correcting speed and solid hard disk
  • Method for increasing BCH (Broadcast Channel) error correcting speed and solid hard disk

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Embodiment Construction

[0027] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0028] A solid-state hard disk is provided in the first embodiment of the present invention, and the solid-state hard disk includes:

[0029] A plurality of first short linear feedback shift registers 100, a plurality of first short linear feedback shift registers 100 are equivalent to each long linear feedback in the encoding and / or decoding process in the BCH error correction algorithm The shift register is split into a plurality of second short linear feedback shift registers; and the plurality of first short linear feedback shift registers 100 are cascaded.

[0030] In this embodiment, multipl...

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Abstract

The invention provides a method for increasing BCH (Broadcast Channel) error correcting speed and a solid hard disk, suitable for the technical field of storage. The method comprises the following steps of: dismounting each long linear feedback shift register in an encoding and / or decoding process in a BCH error correcting algorithm into a plurality of first short linear feedback shift registers; and cascading the first short linear feedback shift registers. Therefore, by using the method, the BCH error correcting speed is increased and the reading-writing performance of the solid hard disk is improved.

Description

technical field [0001] The invention relates to the field of storage technology, in particular to a method for improving the error correction speed of BCH and a solid-state hard disk thereof. Background technique [0002] At present, the error correction algorithm applied to solid-state hard drives is mainly the BCH (Horace Binary Code) error correction algorithm. The BCH error correction algorithm needs to use LFSR (Linear Feedback Shift Register, Linear Feedback Shift Register, Linear Feedback Shift Register) in the process of encoding and decoding. shift register) to implement the remainder operation. With the increase of the BCH code length, the divisor of the remainder operation is usually very long, especially the remainder operation of the encoding process, which needs to be implemented with a very long LFSR, and the number of registers in the LFSR is determined by the divisor. In order to improve the bandwidth, the parallel LFSR is usually implemented by means of ex...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11B20/18
Inventor 莫海锋朱从义贾宗铭张耀辉
Owner RAMAXEL TECH SHENZHEN