General binary phase shift keying (BPSK) signal rapid acquisition module

A signal and fast technology, applied in the field of signal capture, can solve the problems of short capture time, large FPGA resources, long capture time, etc., and achieve the effect of fast capture speed and saving FPGA resources

Inactive Publication Date: 2012-07-04
XIAN UNISTRONG NAVIGATION TECH CO LTD
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  • Abstract
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The advantage of the sliding correlation method is that it is simple to implement and consumes less FPGA resources; the disadvantage is that when the phase difference between the local pseudo code and the received pseudo code is large, it takes a long time to capture, and it is difficult to achieve fast capture
Sequential detection algorithm is suitable for the situation of high signal-to-noise ratio, and it cannot adapt when the frequency offset is large, so it is not used
The significant advantage of the matched filtering method is that it is fast, the capture time is short, and it is easy to achieve fast capture; the disadvantage is that when the pseudo code is a long code, the design consumes a lot of FPGA resources

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  • General binary phase shift keying (BPSK) signal rapid acquisition module
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  • General binary phase shift keying (BPSK) signal rapid acquisition module

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Embodiment Construction

[0021] General BPSK signal fast acquisition module of the present invention comprises preprocessing unit, parallel correlation unit and FFT and judgment unit, each unit is described in detail below in conjunction with accompanying drawing:

[0022] preprocessing unit

[0023] like figure 1 As shown: the preprocessing unit preprocesses the baseband digital signal adc sampled and input by the ADC, and provides the parallel correlation unit with digital signals data_i and data_q near zero frequency. The unit contains a digital frequency synthesis block (NCO), two multiplier blocks, two accumulator blocks and a pre-integration controller block. The working process of this unit is: the ADC samples the baseband signal adc with a rate of fa, adc is multiplied by the orthogonal carrier frequency generated by the NCO, and the signals data_mi and data_mq near zero frequency are obtained. The pre-integration controller module contains two functions, one is to convert the signal into da...

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Abstract

The invention discloses a general binary phase shift keying (BPSK) signal rapid acquisition module which includes a preprocessing unit, a parallel correlation unit and an FFT and determination unit. The preprocessing unit preprocesses the baseband digital signal adc sampled and input by an analog-to-digital converter (ADC), and provides digital signals data_i and data_q close to zero frequency for the parallel correlation unit. The parallel correlation unit performs cyclic storage of the digital signals data_i and data_q and local pseudo code generation and storage, and also performs parallel correlation operation on the pseudo code and data_i and data_q. The FFT and determination unit performs detection and determination of signals in a frequency domain. The inventive general BPSK signal rapid acquisition module can compatibly acquire various signal system GNSS (global navigation satellite system) signals (such as GPS C/A code, BD C code, and GLONASS C code), and adopts a dual-port RAM (random access memory) for matched filtering, so as to effectively save FPGA (field programmable gate array) resources, achieve faster acquisition speed and realize interference detection function.

Description

technical field [0001] The invention belongs to the technical field of signal capture in telecommunication technology, and relates to a signal capture module, in particular to a general BPSK signal fast capture module. Background technique [0002] At present, there are many methods of pseudo code capture, such as sliding correlation method, sequential detection method and matched filtering method. The advantage of the sliding correlation method is that it is simple to implement and consumes less FPGA resources; the disadvantage is that when the phase difference between the local pseudo code and the received pseudo code is large, it takes a long time to capture, and it is difficult to achieve fast capture. Sequential detection algorithm is suitable for the situation of high signal-to-noise ratio, and it cannot adapt when the frequency deviation is large, so it is not used. The obvious advantage of the matched filtering method is that it is fast, the capture time is short, a...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04B1/7075H04B1/708
Inventor 不公告发明人
Owner XIAN UNISTRONG NAVIGATION TECH CO LTD
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