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Chip packaging method

A chip packaging and chip technology, which is applied in the field of conductive film chip packaging, can solve the problems of increasing the complexity of the manufacturing process and increasing the cost, and achieve the effect of reducing electromagnetic interference, reducing complexity and cost

Inactive Publication Date: 2012-09-05
POWERTECH TECHNOLOGY
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, additionally setting an outer shield structure not only increases the cost, but also increases the complexity of the manufacturing process

Method used

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Embodiment Construction

[0012] Please refer to Figure 1a to Figure 1d , which is a side view showing a chip packaging method according to an embodiment of the present invention. Firstly, a chip carrying device 1 is provided, which has a plurality of chip carrying units 2 arrayed thereon. For example, the chip carrier device 1 can be a packaging substrate, a flexible substrate or a lead frame. Each chip carrying unit 2 has a ground ring 21 (ground ring), which is disposed on an upper surface of the chip carrying unit 2 . A chip 3 is disposed on the upper surface of each chip carrying unit 2 and electrically connected thereto. The chip 3 and the chip carrying unit 2 may include wire bonding or flip chip bonding.

[0013] In one embodiment, the ground ring 21 is disposed around the periphery of the chip 3 and is electrically connected to a ground pad (not shown in the figure) of the chip 3 so that the chip 3 can be grounded. Wherein, the shape of the grounding ring 21 can be continuous or discontinu...

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Abstract

The invention discloses a chip packaging method, comprising the following steps of: directly or indirectly exposing a grounding ring out of a packaging material, and then forming a conductive thin film electrically connected with the grounding ring to form electromagnetic wave shielding, and thus reducing external electromagnetic interference. Additionally, via the chip packaging method disclosed by the invention, the conductive thin films of a packaging structure can be formed in quantity, therefore, the complexity and cost of manufacturing process can be reduced.

Description

technical field [0001] The invention relates to a chip packaging method, in particular to a chip packaging method for forming a conductive film electrically connected to a grounding ring. Background technique [0002] Currently, as the electronic system becomes smaller and the density of the electronic components in the system is higher and higher, it is easy to generate electromagnetic interference (EMI) in the system. In addition, it is known that some packaging structures, such as radio frequency (RF) chip packaging structures, are easily affected by electromagnetic interference. Therefore, it is necessary to develop methods and devices capable of reducing the influence of electromagnetic interference, so as to reduce the additive effect of electromagnetic interference in high-density electronic systems and avoid system performance degradation or errors. [0003] At present, there is an outer shield structure designed to shield electromagnetic waves to reduce electromagn...

Claims

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Application Information

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IPC IPC(8): H01L21/50H01L21/56H01L21/60
CPCH01L24/97H01L2224/48091H01L2224/48227H01L2224/97H01L2924/15311H01L2924/19107H01L2924/3025H01L2924/00014H01L2924/00H01L2224/85
Inventor 林昌志徐守谦叶国裕苏峻兴
Owner POWERTECH TECHNOLOGY
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