Device and method for testing wafer

Abstract

The invention discloses a device and a method for testing wafers. The wafer testing device comprises a set of composite probe cards, wherein the composite probe cards comprise at least one group of measurement probe cards, and the measurement probe cards comprise measurement probes used for measuring electrical signals of corresponding wafers and at least one group of fusing probe cards; the fusing probe cards comprise fusing probes used for trimming or programming corresponding wafers; when the composite probe cards are placed at the same position, various groups of probe cards respectively correspond to different wafers, so that during wafer testing, a measurement process and a fusing process of the same wafer are separately carried out, and the measurement precision is improved; moreover, because the measurement processes and the fusing processes of different wafers can be simultaneously carried out, occupied time of a testing machine is never prolonged excessively, and testing cost is proportional to testing time; and according to the device and the method, the measurement precision is improved, but the testing cost is never increased excessively.

Description

【Technical field】 [0001] The invention relates to the field of wafer testing, in particular to a wafer testing device and method. 【Background technique】 [0002] In the chip manufacturing process, it can be divided into four major steps: IC design, wafer manufacturing process, wafer testing and wafer packaging. [0003] Wafers are usually circular silicon wafers with diameters of 4 inches, 6 inches, 8 inches, and 12 inches. In the wafer process stage, a large number of chips that are tightly and regularly distributed will be formed on the wafer. Depending on the size of the wafer, there may be hundreds to hundreds of thousands of chips on a wafer. In the wafer test stage, a test environment is usually built by the test machine and the probe card, and the chips on the wafer are tested in this environment to ensure that the electrical characteristics and functions of each chip meet the design specifications and specifications. . Wafers that fail the test will be marked as b...

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Problems solved by technology

[0005] In the process of realizing the present invention, the inventors have found that the prior art has at least the following defects: First, the probe cards in the prior art usually have electric leakage, and when using the probe card including electric leakage for testing, if these electric leakage On the low-impedance node

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