Digital signal processor based on parallel data channel

A digital signal and data channel technology, applied in the direction of concurrent instruction execution, machine execution devices, etc., can solve the problems of inconspicuous performance improvement, and achieve the effect of improving processing performance, efficiency, and high performance

Inactive Publication Date: 2012-10-03
刘大可
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Problems solved by technology

However, the traditional SIMD processor simply expands the ALU unit for data parallel processing so that it can process multiple input data at the same time. For spec

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  • Digital signal processor based on parallel data channel
  • Digital signal processor based on parallel data channel
  • Digital signal processor based on parallel data channel

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Embodiment Construction

[0038] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0039] Such as figure 1 As shown, it is a schematic structural diagram of a digital signal processor based on a parallel data channel according to an embodiment of the present invention. The parallel data channel 1 of the digital signal processor includes a parallel multiplication unit 11, a parallel operation unit group 12, and a parallel accumulation unit in sequence. 13 Three-layer hardware, of which:

[0040] The parallel multiplication unit 11 is compose...

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Abstract

The invention provides a digital signal processor based on a parallel data channel. The parallel data channel sequentially comprises a parallel multiplication unit, a parallel operation unit set and a parallel accumulating unit, wherein the parallel multiplication unit comprises a plurality of parallel multiplying units and has the capabilities of carrying out multiplex real multiplication or complex multiplication as well as implementing bypass operation; the parallel operation unit set comprises a plurality of arithmetic logic units, and is formed by connecting multiple stages of arithmetic logic channels and a switching network composed by the plurality of arithmetic logic units in each layer, wherein each stage of arithmetic logic channel performs the parallel arithmetic logic operation through the plurality of parallel arithmetic logic units, and the operating result of the previous stage of arithmetic logic channel can be transmitted to the next stage of arithmetic logic channel through the switching network; each arithmetic logic unit is used for performing addition, subtraction, comparison, displacement, or absolute value operation; the bypass operation can be carried out to the layer; and the parallel accumulating unit is formed by a plurality of parallel accumulating units and is used for performing accumulating and post-processing. The digital signal processor based on the parallel data channel improves the processing performance and efficiency of the digital signal processor.

Description

technical field [0001] The invention relates to the technical field of digital signal processors, in particular to a digital signal processor based on parallel data channels. Background technique [0002] Programmable processors realize different computing functions through software programs and have a high degree of flexibility. An important component of a processor is the arithmetic logic unit (ALU), which performs arithmetic and logic operations. The ALU on a general-purpose processor supports simple arithmetic and logic operations. On a general-purpose processor, complex calculations are decomposed into multi-step ALU operations. Common digital signal processing algorithms can be executed by a general-purpose programmable processor, but it is not suitable for use in embedded systems powered by batteries or with low power consumption requirements. Because general-purpose processors cannot simultaneously meet the requirements of digital signal processing algorithms for ...

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Application Information

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IPC IPC(8): G06F9/38
Inventor 刘大可王建猷阿・索安德里雅思・卡尔松
Owner 刘大可
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