Array substrate and liquid crystal display panel
A technology for array substrates and insulating substrates, which is applied in the field of liquid crystal display panels, and can solve problems such as lengthening of the dominant line 78 and poor disconnection, and achieve the effects of suppressing the reduction of yield, reducing the size, and suppressing poor disconnection
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Embodiment approach 1
[0078] As shown below, according to Figure 1 to Figure 5 One embodiment of the present invention will be described.
[0079] The TFT array substrate 20 of this embodiment has the same Figure 12 The described TFT array substrate 20 has substantially the same schematic configuration.
[0080] figure 1 It is a plan view showing a schematic configuration of main parts of the TFT array substrate 20 of the present embodiment.
[0081] Such as figure 1 As shown, in the peripheral region 24 of the TFT array substrate 20 as an array substrate, gate drive circuits 60 (60a, 60b) and gate drive circuit wiring 46 connected to an FPC (not shown) are provided. In addition, in the gate drive circuit 60 as a drive circuit, a TFT element as a drive element is formed.
[0082] In the TFT array substrate 20 of the present embodiment, the gate drive circuit 60 is divided into two drive circuits in the X direction of the TFT array substrate 20 . Specifically, in the above X direction, the ...
Embodiment approach 2
[0171] according to Figure 6 Another embodiment of the TFT array substrate 20 of the present invention will be described.
[0172] In addition, for the convenience of description, members having the same functions as those in the drawings described in Embodiment 1 are denoted by the same reference numerals, and their descriptions are omitted.
[0173] The TFT array substrate 20 of the present embodiment differs from the TFT array substrate 20 of the first embodiment in the form of the gate drive circuit wiring 46 . That is, two clock wirings are added. And, accompanying this, the method of extending the branch wire 79 is different. Described below.
[0174] Such as Figure 6 As shown, in the peripheral region 24 of the TFT array substrate 20, a gate drive circuit 60 and a gate drive circuit wiring 46 connected to an FPC (not shown) are provided.
[0175] As the wiring 46 for the gate drive circuit, along the Y direction of the TFT array substrate 20, there are provided: ...
Embodiment approach 3
[0206] As shown below, according to Figure 8 ~ Figure 10 Another embodiment of the TFT array substrate 20 of the present invention will be described.
[0207] In addition, for convenience of description, members having the same functions as those in the drawings described in the above-mentioned embodiments are assigned the same reference numerals, and descriptions thereof are omitted.
[0208] The TFT array substrate 20 of the present embodiment differs from the TFT array substrate 20 of the first embodiment in the form of the connection portion 80 (switching portion 120 ).
[0209] Figure 8 (a) is a plan view showing an example of a schematic configuration of the connecting portion 80 of the present embodiment, Figure 8 (b) is Figure 8 The Y-Y line sectional view of (a).
[0210] Such as Figure 8 As shown, the connecting portion 80 connects the branch line 78 and the wiring 46 for each gate driving circuit.
[0211] The branch line 78 is formed of the first metal m...
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