Cross-point diode arrays and methods of manufacturing cross-point diode arrays

Abstract

Methods of forming an array of memory cells and memory cells that have pillars. Individual pillars can have a semiconductor post formed of a bulk semiconductor material and a sacrificial cap on the semiconductor post. Source regions can be between columns of the pillars, and gate lines extend along a column of pillars and are spaced apart from corresponding source regions. Each gate line surrounds a portion of the semiconductor posts along a column of pillars. The sacrificial cap structure can be selectively removed to thereby form self-aligned openings that expose a top portion of corresponding semiconductor posts. Individual drain contacts formed in the self-aligned openings are electrically connected to corresponding semiconductor posts.

Description

technical field [0001] The present technology relates to cross-point diode arrays and other types of structures used in memory devices or other types of electronic devices and methods for fabricating such structures. Background technique [0002] The microelectronics industry is under intense pressure to produce high-performance devices in small package sizes at ever-decreasing costs. Smart phones, portable computers, digital cameras, portable music and media players, and many other electronic products require faster memory devices with higher capacities. As such, memory device manufacturers, inter alia, seek reliable, low-cost processes for fabricating high performance devices. [0003] Memory devices can have large arrays of memory cells, and reducing the size of individual memory cells provides a concomitant increase in the bit density of the memory device. Cross point memory cells are located in the vertical overlap region between word lines and bit lines. A cross-poi...

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Problems solved by technology

[0004] One concern with fabricating cross-point memory cells is that it can be difficult to use photolithographic processes to form the smallest features of the structure

For example, it is difficult to pattern a wafer to form the drain structures of cross-point memory cells because the features are so small that they cannot be reliably formed using existing photolithographic processes

It is also difficult to photopattern gate structures that completely surround individual pillars in high-density cross-point memory arrays

In addition, forming very small features using photolithographic processes is expensive because these processes require expensive equipment and materials

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