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Vertical transistor including reentrant profile

一种晶体管、轮廓的技术，应用在晶体管、半导体器件、半导体/固态器件制造等方向，能够解决难以控制厚度等问题

Inactive Publication Date: 2012-11-14
EASTMAN KODAK CO
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, it is difficult to control the thickness of the deposited layer

Method used

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  • Vertical transistor including reentrant profile
  • Vertical transistor including reentrant profile
  • Vertical transistor including reentrant profile

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Experimental program
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Embodiment Construction

[0016] This description will refer in particular to elements which form part of a device according to the invention, or which cooperate more directly with the device. It is to be understood that elements not specifically shown or described may take various forms well known to those skilled in the art.

[0017] refer to figure 1 , shows a schematic cross-sectional view of the vertical transistor 100 . Transistor 100 comprises a substrate 110 , a (first) layer of conductive material 120 and a (first) layer of electrically insulating material 130 . Transistor 100 also comprises a further (second) layer of electrically insulating material 150 , a layer of semiconducting material 160 , electrode(s) 700 and electrode 800 .

[0018] The conductive layer 120 is located between the substrate 110 and the insulating layer 130 . A first surface of the conductive layer 120 is in contact with the first surface of the substrate 110 , and a second surface of the conductive layer 120 is in ...

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Abstract

A transistor includes a substrate, an electrically conductive material layer, and an electrically insulating material layer. At least a portion of one or more of the substrate, the electrically conductive material layer, and the electrically insulating material layer define a reentrant profile.

Description

technical field [0001] The present invention relates generally to semiconductor devices and, in particular, to transistor devices. Background technique [0002] In semiconductor processing technology, a planar substrate surface, which is horizontal relative to the wafer surface, is patterned by means of photolithography combined with a selective etching process. During the processing of integrated circuits, reliefs with pronounced topography are formed on the surface of a wafer or substrate. Typically, such reliefs include surfaces that are inclined or perpendicular relative to the substrate surface. As the dimensions of integrated circuits continue to shrink, it becomes increasingly necessary to form vertical or sloped device surfaces in order to functionally differentiate these devices over their vertical extent, while still maintaining pattern alignment. Examples of these types of semiconductor devices include deep trench capacitors, stack capacitors, and vertical trans...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336H01L29/786H10B12/00
CPCH01L29/66787H01L29/7869H01L29/78642H01L29/78681H03K17/687H01L29/786
Inventor L·W·塔特S·F·纳尔逊
Owner EASTMAN KODAK CO