Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Method for finishing semiconductor-on-insulator type substrate

A semiconductor and insulator technology, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve problems such as incomplete packaging

Active Publication Date: 2014-10-22
S O I TEC SILICON ON INSULATOR THECHNOLOGIES
View PDF8 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0017] The second type of defect is called a "jagged edge" and is formed by an extended surface of the upper silicon beyond the general edge of the surface being transferred
[0020] The package may not even be complete depending on the irregular shape of the substrate edge (board edge), so some parts of the buried insulator may still be accessible for chemical etching, for example with hydrofluoric acid (HF)
[0021] In addition, some flakes or jagged-edged flakes, may detach from the receiving substrate before encapsulation and deposit again on the surface layer 3 of the SeOI substrate, which is then encapsulated and finally sealed, causing defects on this layer

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for finishing semiconductor-on-insulator type substrate
  • Method for finishing semiconductor-on-insulator type substrate
  • Method for finishing semiconductor-on-insulator type substrate

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0059] The method according to the invention is a so-called "finishing" method for substrates of the SeOI-type semiconductor-on-insulator, since it involves steps followed by a detachment anneal leading to the transfer of layers and the steps performed in the formation of this substrate Step, the substrate includes an insulator layer buried between two semiconductor material layers.

[0060] will now refer to Figures 6A-6C The method according to the invention is described.

[0061] refer to Figure 6A , it can be seen that the substrate 4 of SeOI type comprises in sequence a surface layer 41 of semiconductor material, a buried insulator layer 42 and a support 43 also made of semiconductor material.

[0062] As shown in this figure, at the end of the layer transfer step, the obtained SeOI substrate 4 has defects of the aforementioned type, namely lamellae 44 (only one of which is shown in this figure) and peripheral annular jagged edges , labeled 45.

[0063] The first st...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention relates to finishing a substrate of the semiconductor-on-insulator (SeOI) type comprising an insulator layer buried between two semiconducting material layers. The method successively comprises routing the annular periphery of the substrate so as to obtain a routed substrate, and encapsulating the routed substrate so as to cover the routed side edge of the buried insulator layer by means of a semiconducting material.

Description

technical field [0001] The present invention generally relates to the preparation of a substrate for use in the fields of electronics, optics and optoelectronics. [0002] More specifically, it concerns the finishing method of substrates known by the acronym SeOI (“Semiconductor On Insulator”). Background technique [0003] The present invention finds particular application in finishing "SOI" substrates, in which the semiconductor is silicon. [0004] Among the different preparation methods that have been applied, the references may consist of the steps of bonding and transfer layers in those applications. An example of this method is described below. [0005] According to this method, embrittlement regions are produced in a first so-called "donor" substrate, which is covered with an insulating layer, for example by implanting atoms and / or ionic species. This substrate in turn adheres by intermolecular adhesion to a second, so-called "receiving" substrate. [0006] Next,...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
IPC IPC(8): H01L21/762
CPCH01L21/02087H01L21/76251H01L21/76243
Inventor W·施瓦岑巴赫A·阿拉米-伊德里希A·希布科S·凯尔迪勒
Owner S O I TEC SILICON ON INSULATOR THECHNOLOGIES
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products