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Thin film transistor, array substrate and manufacturing method thereof, and liquid crystal display

A thin-film transistor and array substrate technology, applied in the field of liquid crystal display, can solve the problems of reducing the response speed of liquid crystal and the thickness of the cell, and achieve the effect of improving the response speed of the liquid crystal and the thickness of the cell

Active Publication Date: 2014-10-15
BOE TECH GRP CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] In the current TFT array substrate, since most of the TFTs are stacked vertically, the thickness of the cell is relatively thick, which reduces the response speed of the liquid crystal

Method used

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  • Thin film transistor, array substrate and manufacturing method thereof, and liquid crystal display
  • Thin film transistor, array substrate and manufacturing method thereof, and liquid crystal display
  • Thin film transistor, array substrate and manufacturing method thereof, and liquid crystal display

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Embodiment Construction

[0048] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention.

[0049] Embodiments of the present invention provide a thin film transistor, such as figure 1 As shown, it includes: a substrate 201; a gate 202 is formed on the substrate 201; a gate insulating layer 203 covering the gate 202; a semiconductor active layer 207, a pixel electrode layer 204, and a source 208 are formed on the gate insulating layer 203 and the drain electrode 206; wherein, the pixel electrode layer 204 is located below the source electrode 208 and the drain electrode 206, and is in contact with the source electrode 208 and the drain electrode 206; 206 and the stack of the pixel electrode layer 204 below it is located in the same layer of the semiconducto...

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Abstract

The embodiment of the invention provides a thin film transistor, an array substrate and preparation methods of the thin film transistor and the array substrate, and a liquid crystal display, and relates to the field of manufacture of a liquid crystal panel. The thickness of the thin film transistor can be reduced. The thin film transistor comprises a substrate, and a gate insulating layer for covering a gate; the gate is formed on the substrate; a semiconductor active layer, a pixel electrode layer, a source and a drain are formed on the gate insulating layer; the pixel electrode layer is below the source and the drain and contacts the source and the drain; the source and a laminating layer of the pixel electrode layer below the source, the drain and the laminating layer of the pixel electrode layer below the drain are on the same layer of the semiconductor active layer; the source and the laminating layer of the pixel electrode layer below the source, the drain and the laminating layer of the pixel electrode layer below the drain are cut off by the semiconductor active layer, and passivation layers are formed on the source, the drain, the pixel electrode layer and the semiconductor active layer. The embodiment of the invention is used for manufacturing the liquid crystal display.

Description

technical field [0001] The invention relates to the field of liquid crystal display, in particular to a thin film transistor, an array substrate and a manufacturing method thereof, and a liquid crystal display. Background technique [0002] Among flat panel display technologies, TFT-LCD (Thin Film Transistor-Liquid Crystal Display) has the characteristics of low power consumption, relatively low manufacturing cost, and no radiation, so it occupies a dominant position in the flat panel display market. TFT-LCD is formed by a TFT (Thin Film Transistor) array substrate and a color filter substrate. [0003] The current mainstream amorphous silicon TFT array substrate 5-Mask (5-mask) process, each process includes deposition, exposure, development, etching, stripping and so on. A gate line, a gate insulating layer, a semiconductor active layer, a data line, a source, a drain, a passivation layer, and a pixel electrode layer are sequentially formed on the substrate through each p...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/417H01L29/786H01L21/28H01L21/336H01L21/77G02F1/1368
Inventor 张弥
Owner BOE TECH GRP CO LTD