Data transmission device, system and method

Abstract

The invention provides a data transmission device, a data transmission system and a data transmission method. The device comprises a data transfer module and an interrupt management module, wherein the data transfer module is used for reading the configuration information of a first transmission buffer of a first processor core, and controlling a direct memory access (DMA) module to transmit data from the first transmission buffer to a receiving buffer, and setting interrupt information when the configuration information indicates that the first transmission buffer stores the data to be transmitted to the receiving buffer of a second processor core; and the interrupt management module is used for reading the interrupt information, and controlling a multi-core interrupt controller to trigger interrupt to the second processor core to process the data in the receiving buffer by the second processor core when the interrupt information indicates that the interrupt to the second processor core is required to be triggered. According to the embodiment of the invention, the consumption of the processor cores in an inter-core communication process can be reduced, and the service processing capability of the processor cores can be improved.

Description

technical field [0001] The present invention relates to the fields of computer and communication, and in particular, to a device, system and method for transmitting data. Background technique [0002] At present, whether it is a mainframe or a personal computer (PC) with an x86 architecture, a multi-core architecture has begun to be developed. For example, two cores and four cores have become common configurations in today's PC field. In addition, with the rapid development of multimedia audio and video applications, the increasing demand for massive data processing, and the rapid development of processor technology, embedded microprocessors are also developing in the direction of two-core, four-core and more cores. It can be seen that from the most high-end server processors to embedded processors that are very sensitive to power consumption, all mainstream processor architectures have embarked on the road of multi-core. [0003] The data processing process between multip...

AI Technical Summary

Problems solved by technology

The currently commonly used inter-core communication method is that the sending processor core or the receiving processor core itself is responsible for data transfer and interruption operations, which causes the consumption of each core in inter-core communication to increase with the increase in the amount of transmitted data. The continuous growth has caused some businesses to be unable to process normally, seriously reducing the business processing capability of the processor core

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