Control register mapping in heterogenous instruction set architecture processor

Abstract

A microprocessor capable of running both x86 instruction set architecture (ISA) machine language programs and Advanced RISC Machines (ARM) ISA machine language programs. The microprocessor includes a mode indicator that indicates whether the microprocessor is currently fetching instructions of an x86 ISA or ARM ISA machine language program. The microprocessor also includes a plurality of model-specific registers (MSRs) that control aspects of the operation of the microprocessor. When the mode indicator indicates the microprocessor is currently fetching x86 ISA machine language program instructions, each of the plurality of MSRs is accessible via an x86 ISA RDMSR / WRMSR instruction that specifies an address of the MSR. When the mode indicator indicates the microprocessor is currently fetching ARM ISA machine language program instructions, each of the plurality of MSRs is accessible via an ARM ISA MRRC / MCRR instruction that specifies the address of the MSR.

Description

technical field [0001] The invention relates to the technical field of microprocessors, in particular to a microprocessor whose control register corresponds to a heterogeneous instruction set architecture. Background technique [0002] The x86 processor architecture developed by Intel Corporation of Santa Clara, California and the advanced risc machines (ARM) architecture developed by ARM Ltd. of Cambridge, UK are two well-known processors in the computer field architecture. Many computer systems using ARM or x86 processors have appeared, and the demand for such computer systems is growing rapidly. Today, ARM architecture processing cores dominate the low-power, low-cost segment of the computer market, such as mobile phones, handheld electronic products, tablet computers, network routers and hubs, and set-top boxes. For example, the main processing power of the Apple iPhone and iPad is provided by the processing core of the ARM architecture. On the other hand, x86-archite...

AI Technical Summary

Problems solved by technology

However, there are technical problems with the use of binary translation techniques (e.g. self-modifying code, indirect branch values ​​known only at run-time) and commercial and Legal obstacles (for example: this technology may require the cooperation of hardware developers to develop channels for distributing new programs; there is a risk of potential authorization or copyright infringement for the original program distributors)

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