A circuit for enhancing write operation of static random access memory

A static random and memory technology, applied in static memory, digital memory information, information storage, etc., can solve the problem of ignoring the transmission of '1' bit lines, etc., to achieve the effect of eliminating threshold loss and reliable coverage

Active Publication Date: 2015-10-28
XI AN UNIIC SEMICON CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
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AI Technical Summary

Problems solved by technology

[0005] In fact, during the write operation, the selected two complementary bit lines transmit '0' and '1' respectively, and the above negative voltage technology only considers the bit line transmitting '0', ignoring the transmission of '1' bit line

Method used

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  • A circuit for enhancing write operation of static random access memory
  • A circuit for enhancing write operation of static random access memory
  • A circuit for enhancing write operation of static random access memory

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Embodiment Construction

[0026] Embodiments of the present invention will be further described below in conjunction with the accompanying drawings.

[0027] see figure 1 as shown, figure 1 It is an example of a SRAM implemented according to the present invention. Generally, the circuits that the SRAM needs to work during the write operation include a memory cell array, a word line driver S5, a write driver S4, a bit selection driver S6, and a bit line selector array S7. The word line driver S5 is connected to the memory cell array, the bit line selector array S7 includes multiple columns, each column includes a bit line selector, and the bit line selector is connected to a corresponding column in the memory cell array; the first output line of the write driver S4 WRBL is connected to all the first bit lines BL through the bit selector array S7, and the second output line WRBLN of the write driver S4 is connected to all the second bit lines BLN through the bit selector array S7. The bit selection dr...

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Abstract

The invention provides a circuit capable of enhancing write operation of a static random access memory. In write operation, the voltage of a bit line writing '1' is higher than the power voltage of a memory unit and the voltage of a bit line writing '0' is lower than the ground voltage of the memory unit. When the circuit is used in the write operation, the maximum voltage difference between a first bit line and a second bit line is increased, even if certain voltage loss is caused after transmission through the bit lines, multivoltage is not adopted, or only a negative voltage technical scheme is adopted to obtain higher voltage difference at the selected memory unit, so that the original data in the memory unit are rapidly and reliably covered.

Description

【Technical field】 [0001] The invention relates to the field of static random access memory design, in particular to a circuit for writing operation of the static random access memory. 【Background technique】 [0002] Static random access memory is a common random access memory, which is widely used in the field of integrated circuits. Compared with dynamic random access memory, its advantage is that the stored data does not need to be refreshed; the disadvantage is that the degree of integration is low. Therefore, on the one hand, the SRAM is widely used because of its performance advantages, and on the other hand, its low integration level makes the design of large-capacity SRAM a difficult problem. [0003] A common SRAM memory cell is a so-called 6T structure composed of six transistors. Each storage unit is composed of two first-connected inverters and two switching transistors, where the output node of the inverter constitutes a pair of complementary storage nodes, whic...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C11/413
Inventor 拜福君亚历山大
Owner XI AN UNIIC SEMICON CO LTD
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