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ECC decoding control method for data storage

A technology for decoding control and data storage, applied in static memory, instruments, etc., can solve the problems of storage time retention decline, affect NANDFLASH performance, decoding power consumption and delay, and NANDFLASH storage unit retention decline, etc., to solve the problem of retention Falling effect

Active Publication Date: 2015-10-28
XIAMEN IND TECH RES INST CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] 1. The reliability degradation of NAND FLASH storage cells makes BER (Bit Error Rate, bit error rate) increase with the increase of programming and erasing times;
[0005] 2. The retention of NAND FLASH storage cells decreases, making BER increase rapidly with the increase of storage time
[0008] However, for the problem of decreased retention due to storage time, since the reading time of data cannot be predicted, that is, the storage time of data is unpredictable, it is necessary to use the LDPC code with the highest error correction capability for all data. However, this is It will seriously affect the performance of NAND FLASH, and cause great decoding power consumption and delay
[0009] It can be seen that in order to solve the problem of reduced retention due to storage time in the prior art, it is impossible to take into account the performance of NAND FLASH, as well as decoding power consumption and delay at the same time

Method used

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  • ECC decoding control method for data storage
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  • ECC decoding control method for data storage

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Embodiment Construction

[0031] In order to make the object, technical solution and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and examples.

[0032] In view of the unpredictability of the storage time, the ECC decoding control method used for data storage in this embodiment first constructs at least two check matrices with different error correction capabilities for the ECC encoding method, but both are constrained by the ECC encoding method, so as to adapt to There may be different lengths of storage time for encoded data.

[0033] That is, for coded data with a relatively long storage time, a parity check matrix with relatively high error correction capability can be selected to ensure a sufficiently low BER;

[0034] For encoded data with a short storage time, a parity check matrix with relatively low error correction capability can meet a sufficiently low BER, and at the same time ensure ...

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Abstract

The invention discloses an ECC (Error Correcting Code) decoding control method for data storage. According to the ECC decoding control method, an ECC coding method reconstructs at least two check matrixes with different error correcting capabilities; accordingly, when coded data is read each time, according to storage time, the check matrix with proper error correcting capability is selected for decoding. Therefore, for the coded data with long storage time, enough low data code error rate can be ensured by utilizing relatively high error correcting capability; and for coded data with short storage time, the storage performance can be ensured and power consumption and delay for decoding can be saved by utilizing the check matrix with the relatively low error correcting capability. Accordingly, the ECC decoding control method not only can solve the problem that the retentivity is reduced due to storage time, but also can integrate the storage performance and the decoding power consumption and delay only when the storage time of the coded data has certain randomness.

Description

technical field [0001] The present invention relates to data storage technology, in particular to an ECC (Error Correcting Code, error checking and correction) decoding control method for data storage. Background technique [0002] In the existing technology, SSD (Solid State Disk, solid state drive) data storage system based on NAND FLASH (and non-flash memory) benefits from high throughput, low power consumption, shock resistance, high stability, low temperature resistance, low heat generation, With many advantages such as low working noise, it has broad application prospects in the fields of enterprise high-performance computers, military and industry, personal computers, ultra-low-cost personal computers, and enterprise computers. [0003] However, with the reduction of the size of the NAND FLASH process and the application of MLC (Multi-Level Cell, multi-layer unit) technology, serious reliability problems have occurred in NAND FLASH. Specifically, the reliability of N...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C29/42
Inventor 潘立阳麻昊志宋昌来
Owner XIAMEN IND TECH RES INST CO LTD
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